riscv: use lw when reading int cpu in new_vmalloc_check

REG_L is wrong, because thread_info.cpu is 32-bit, not xlen-bit wide.
The struct currently has a hole after cpu, so little endian accesses
seemed fine.

Fixes: 503638e0babf ("riscv: Stop emitting preventive sfence.vma for new vmalloc mappings")
Cc: stable@vger.kernel.org
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Radim Krčmář <rkrcmar@ventanamicro.com>
Link: https://lore.kernel.org/r/20250725165410.2896641-4-rkrcmar@ventanamicro.com
Signed-off-by: Paul Walmsley <pjw@kernel.org>

diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S
index 3a0ec6fd595691c873717ae1e6af5b3ed9854ca2..d0ded2438533c4aa07116f645ee0501cb77b94cc 100644 (file)
--- a/arch/riscv/kernel/entry.S
+++ b/arch/riscv/kernel/entry.S
@@ -46,7 +46,7 @@
         * a0 = &new_vmalloc[BIT_WORD(cpu)]
         * a1 = BIT_MASK(cpu)
         */
-       REG_L   a2, TASK_TI_CPU(tp)
+       lw      a2, TASK_TI_CPU(tp)
        /*
         * Compute the new_vmalloc element position:
         * (cpu / 64) * 8 = (cpu >> 6) << 3