net: hns3: remove now redundant logic related to HNAE3_UNKNOWN_RESET

Earlier patches have decoupled the MSI-X conveyed error handling
and recovery logic. This earlier concept code is no longer required.

Signed-off-by: Yufeng Mo <moyufeng@huawei.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: Jiaran Zhang <zhangjiaran@huawei.com>
Signed-off-by: Guangbin Huang <huangguangbin2@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
index 89b2b7fa7b8bcb2473d3ab4e8b33b6f1a49767b7..dc9b5bc3431bf5f885ea328183c8458687287f62 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h
+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h
@@ -243,7 +243,6 @@ enum hnae3_reset_type {
        HNAE3_FUNC_RESET,
        HNAE3_GLOBAL_RESET,
        HNAE3_IMP_RESET,
-       HNAE3_UNKNOWN_RESET,
        HNAE3_NONE_RESET,
        HNAE3_MAX_RESET,
 };

diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
index 4b1aa5c45852a40e0a84f7fe8588222ed8b2a405..45102681bd2a18485c226a2b5c239b10b79ea7fb 100644 (file)
--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c
@@ -3792,28 +3792,6 @@ static enum hnae3_reset_type hclge_get_reset_level(struct hnae3_ae_dev *ae_dev,
        enum hnae3_reset_type rst_level = HNAE3_NONE_RESET;
        struct hclge_dev *hdev = ae_dev->priv;
 
-       /* first, resolve any unknown reset type to the known type(s) */
-       if (test_bit(HNAE3_UNKNOWN_RESET, addr)) {
-               u32 msix_sts_reg = hclge_read_dev(&hdev->hw,
-                                       HCLGE_MISC_VECTOR_INT_STS);
-               /* we will intentionally ignore any errors from this function
-                *  as we will end up in *some* reset request in any case
-                */
-               if (hclge_handle_hw_msix_error(hdev, addr))
-                       dev_info(&hdev->pdev->dev, "received msix interrupt 0x%x\n",
-                                msix_sts_reg);
-
-               clear_bit(HNAE3_UNKNOWN_RESET, addr);
-               /* We defered the clearing of the error event which caused
-                * interrupt since it was not posssible to do that in
-                * interrupt context (and this is the reason we introduced
-                * new UNKNOWN reset type). Now, the errors have been
-                * handled and cleared in hardware we can safely enable
-                * interrupts. This is an exception to the norm.
-                */
-               hclge_enable_vector(&hdev->misc_vector, true);
-       }
-
        /* return the highest priority reset level amongst all */
        if (test_bit(HNAE3_IMP_RESET, addr)) {
                rst_level = HNAE3_IMP_RESET;