]> www.infradead.org Git - users/hch/misc.git/commitdiff
drm/i915/dram: add intel_fsb_freq() and use it
authorJani Nikula <jani.nikula@intel.com>
Mon, 18 Aug 2025 10:07:24 +0000 (13:07 +0300)
committerJani Nikula <jani.nikula@intel.com>
Tue, 19 Aug 2025 08:20:40 +0000 (11:20 +0300)
Add a more generic intel_fsb_freq() function instead of platform
specific ones.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/c5b77311c5f64b7163c86a042b7d023c07a685e2.1755511595.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_cdclk.c
drivers/gpu/drm/i915/gt/intel_gt_clock_utils.c
drivers/gpu/drm/i915/soc/intel_dram.c
drivers/gpu/drm/i915/soc/intel_dram.h

index f7f76de0f94464d179c2ac1c68323e4463d9eff4..d7ba3970e1e92912d243f6ffddd066a20c99febc 100644 (file)
@@ -3574,7 +3574,7 @@ static int i9xx_hrawclk(struct intel_display *display)
        struct drm_i915_private *i915 = to_i915(display->drm);
 
        /* hrawclock is 1/4 the FSB frequency */
-       return DIV_ROUND_CLOSEST(i9xx_fsb_freq(i915), 4);
+       return DIV_ROUND_CLOSEST(intel_fsb_freq(i915), 4);
 }
 
 /**
index 6c499692d61ef36f67a5ec67fd5e315e0eb42619..88b147fa5cb131e03f65edb0348a495002f9f381 100644 (file)
@@ -148,7 +148,7 @@ static u32 gen4_read_clock_frequency(struct intel_uncore *uncore)
         *
         * Testing on actual hardware has shown there is no /16.
         */
-       return DIV_ROUND_CLOSEST(i9xx_fsb_freq(uncore->i915), 4) * 1000;
+       return DIV_ROUND_CLOSEST(intel_fsb_freq(uncore->i915), 4) * 1000;
 }
 
 static u32 read_clock_frequency(struct intel_uncore *uncore)
index b3c407cc200f6eea48b4cfd4537897f3fe3c9a62..366891cda6b9af2964d3ab149287f12d0710ba33 100644 (file)
@@ -154,7 +154,7 @@ static void detect_mem_freq(struct drm_i915_private *i915)
                drm_dbg(&i915->drm, "DDR speed: %d kHz\n", i915->mem_freq);
 }
 
-unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
+static unsigned int i9xx_fsb_freq(struct drm_i915_private *i915)
 {
        u32 fsb;
 
@@ -236,13 +236,19 @@ static unsigned int ilk_fsb_freq(struct drm_i915_private *dev_priv)
        }
 }
 
-static void detect_fsb_freq(struct drm_i915_private *i915)
+unsigned int intel_fsb_freq(struct drm_i915_private *i915)
 {
        if (GRAPHICS_VER(i915) == 5)
-               i915->fsb_freq = ilk_fsb_freq(i915);
+               return ilk_fsb_freq(i915);
        else if (GRAPHICS_VER(i915) == 3 || GRAPHICS_VER(i915) == 4)
-               i915->fsb_freq = i9xx_fsb_freq(i915);
+               return i9xx_fsb_freq(i915);
+       else
+               return 0;
+}
 
+static void detect_fsb_freq(struct drm_i915_private *i915)
+{
+       i915->fsb_freq = intel_fsb_freq(i915);
        if (i915->fsb_freq)
                drm_dbg(&i915->drm, "FSB frequency: %d kHz\n", i915->fsb_freq);
 }
index 2a696e03aad49f5d7f7ee071601ebb2dd19af5fa..09a7a581d9492dea6cbb84ea7535cde3b55a2b85 100644 (file)
@@ -33,7 +33,7 @@ struct dram_info {
 
 void intel_dram_edram_detect(struct drm_i915_private *i915);
 int intel_dram_detect(struct drm_i915_private *i915);
-unsigned int i9xx_fsb_freq(struct drm_i915_private *i915);
+unsigned int intel_fsb_freq(struct drm_i915_private *i915);
 const struct dram_info *intel_dram_info(struct drm_device *drm);
 
 #endif /* __INTEL_DRAM_H__ */