* New i2c.c driver for 82xx (by Marius Gröger)
+* Fix TFTP over routers: send ARP to router's ethernet address.
+
+* Add code to recognize ICMP Host Redirect messages; print a warning
+ (probably bad BOOTP server configuration, like announcing a wrong
+ or unnecessary router).
+
+* Fix BCSR address in FADS860T configuration (preventing ethernet
+ from working)
+
* "setenv" and "saveenv" commands no longer auto-repeatable
* Restrict baudrate settings to certain legal values (see table
LIB = lib$(BOARD).a
OBJS := rsdproto.o flash.o
-SOBJS :=
+SOBJS := flash_asm.o
-$(LIB): $(OBJS)
+$(LIB): $(OBJS) $(SOBJS)
$(AR) crv $@ $^
clean:
* Functions
*/
-static unsigned char write_ull(flash_info_t *info, unsigned long address,
- volatile unsigned long long data);
static int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt);
int flash_write(uchar *, ulong, ulong);
flash_info_t *addr2info (ulong);
-
static int flash_protect (int flag, ulong from, ulong to, flash_info_t *info);
+static unsigned char write_ull(flash_info_t *info,
+ unsigned long address,
+ volatile unsigned long long data);
-/*---------------------------------------------------------------------------
-*
-* MACRO NAME: ull_read/ull_write
-*
-* DESCRIPTION: uses the floating point unit from 8260 to read and write
-* 64 bit wide data (unsigned long long) on the 60x bus.
-* this is necessary because all 4 Flash Chips use the /WE line
-* from byte lane 0
-* important -> data should allways be 8-alligned, otherwise exception !!
-*
-* EXTERNAL EFFECT: scratch register f0
-*
-* PARAMETERS: 32 bit long pointer to adress, 64 bit long pointer to data
-*
-* RETURNS: nothing
-*--------------------------------------------------------------------------*/
-
-static void ull_write(unsigned long long volatile *address,
- unsigned long long volatile *data)
-{
- double tmp;
-
- __asm__ __volatile__(
- " lfd %0,0(%2)\n"
- " stfd %1,0(%3)\n"
- : "=f" (tmp) /* outputs */
- : "0" (tmp), "r" (data), "r" (address) /* inputs */
- );
-
- D(("ull_write: address %08lx <- data %08lx%08lx\n",
- (ulong)address,
- (ulong)(*data >> 32), (ulong)(*data & 0xffffffff)));
-}
-
-#ifdef WITH_AUTOSELECT
-static void ull_read(unsigned long long *address,
- unsigned long long *data)
-{
- double tmp;
-
- __asm__ __volatile__(
- " lfd %0,0(%3)\n"
- " stfd %1,0(%2)\n"
- : "=f" (tmp) /* outputs */
- : "0" (tmp), "r" (data), "r" (address) /* inputs */
- );
-
- D(("ull_read: address %08lx -> data %08lx%08lx\n",
- (ulong)address,
- (ulong)(*data >> 32), (ulong)(*data & 0xffffffff)));
-}
-#endif
+/* from flash_asm.S */
+extern void ull_write(unsigned long long volatile *address,
+ unsigned long long volatile *data);
+extern void ull_read(unsigned long long volatile *address,
+ unsigned long long volatile *data);
/*-----------------------------------------------------------------------
*/
#ifdef WITH_AUTOSELECT
{
- unsigned long long *f_addr = (unsigned long long *)CFG_FLASH_BASE;
+ unsigned long long *f_addr = (unsigned long long *)PHYS_FLASH;
unsigned long long f_command, vendor, device;
/* Perform Autoselect */
f_command = 0x00AA00AA00AA00AAULL;
flash_info[0].flash_id = VENDOR_AMD << 16 | AMD_29DL323C_B;
flash_info[0].sector_count = 8;
flash_info[0].size = flash_info[0].sector_count * 32 * 1024;
- addr = CFG_FLASH_BASE;
+ addr = PHYS_FLASH;
for(i = 0; i < flash_info[0].sector_count; i++) {
flash_info[0].start[i] = addr;
addr += flash_info[0].size / flash_info[0].sector_count;
* protect monitor and environment sectors
*/
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CFG_MONITOR_BASE >= PHYS_FLASH
(void)flash_protect(FLAG_PROTECT_SET,
CFG_MONITOR_BASE,
CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
&flash_info[0]);
+ (void)flash_protect(FLAG_PROTECT_SET,
+ CFG_MONITOR_BASE,
+ CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+ &flash_info[1]);
#endif
-#if defined(CFG_FLASH_ENV_ADDR)
+#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
+# ifndef CFG_ENV_SIZE
+# define CFG_ENV_SIZE CFG_ENV_SECT_SIZE
+# endif
(void)flash_protect(FLAG_PROTECT_SET,
- CFG_FLASH_ENV_ADDR,
-#if defined(CFG_FLASH_ENV_BUF)
- CFG_FLASH_ENV_ADDR + CFG_FLASH_ENV_BUF - 1,
-#else
- CFG_FLASH_ENV_ADDR + CFG_ENV_SIZE - 1,
-#endif
- &flash_info[0]);
+ CFG_ENV_ADDR,
+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+ &flash_info[0]);
+ (void)flash_protect(FLAG_PROTECT_SET,
+ CFG_ENV_ADDR,
+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+ &flash_info[1]);
#endif
return flash_info[0].size + flash_info[1].size;
--- /dev/null
+/*
+ * -*- mode:c -*-
+ *
+ * (C) Copyright 2000
+ * Marius Groeger <mgroeger@sysgo.de>
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ *
+ * void ull_write(unsigned long long volatile *address,
+ * unsigned long long volatile *data)
+ * r3 = address
+ * r4 = data
+ *
+ * void ull_read(unsigned long long volatile *address,
+ * unsigned long long volatile *data)
+ * r3 = address
+ * r4 = data
+ *
+ * Uses the floating point unit to read and write 64 bit wide
+ * data (unsigned long long) on the 60x bus. This is necessary
+ * because all 4 flash chips use the /WE line from byte lane 0
+ *
+ * IMPORTANT: data should always be 8-aligned, otherwise an exception will
+ * occur.
+ */
+
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+
+.globl ull_write
+ull_write:
+ lfd 0,0(r4)
+ stfd 0,0(r3)
+ blr
+
+ .globl ull_read
+ull_read:
+ lfd 0, 0(r3)
+ stfd 0, 0(r4)
+ blr
.text :
{
cpu/mpc8260/start.o (.text)
- common/dlmalloc.o (.text)
- ppc/ppcstring.o (.text)
- ppc/vsprintf.o (.text)
- ppc/crc32.o (.text)
- . = env_offset;
- common/environment.o(.text)
*(.text)
*(.fixup)
*(.got1)
+ /*. = env_offset; */
}
_etext = .;
PROVIDE (etext = .);
hang();
}
-#if defined(CONFIG_COGENT) || defined(CONFIG_SXNI855T)
+#if defined(CONFIG_COGENT) || defined(CONFIG_SXNI855T) || defined(CONFIG_RSD_PROTO)
/* miscellaneous platform dependent initialisations */
if (misc_init_f() < 0) {
printf (failed);
}
#ifdef DEBUG_PARSER
-printf ("[RUN_COMMAND] lastlen=%d -> %s\n", lastlen, lastcommand);
+ printf ("[RUN_COMMAND] lastlen=%d -> %s\n", lastlen, lastcommand);
#endif
/* Process separators and check for non-valid repeatable commands */
if (process_separators (lastcommand, lastlen, cmdtp, bd, flag) == 0) {
{
int length;
- for (;;)
- {
+ for (;;) {
/* section 16.9.23.2 */
if (rtx->rxbd[rxIdx].cbd_sc & BD_ENET_RX_EMPTY) {
length = -1;
length = rtx->rxbd[rxIdx].cbd_datlen;
- if (rtx->rxbd[rxIdx].cbd_sc & 0x003f)
- {
+ if (rtx->rxbd[rxIdx].cbd_sc & 0x003f) {
#ifdef ET_DEBUG
printf("err: %x\n", rtx->rxbd[rxIdx].cbd_sc);
#endif
- }
- else
- {
+ } else {
/* Pass the packet up to the protocol layers. */
NetReceive(NetRxPackets[rxIdx], length - 4);
}
if ((rxIdx + 1) >= PKTBUFSRX) {
rtx->rxbd[PKTBUFSRX - 1].cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY);
rxIdx = 0;
- }
- else {
+ } else {
rtx->rxbd[rxIdx].cbd_sc = BD_ENET_RX_EMPTY;
rxIdx++;
}
*/
/* the other CS:s are determined by looking at parameters in BCSRx */
-#define BCSR_ADDR ((uint) 0xFF01000)
+#define BCSR_ADDR ((uint) 0xFF010000)
#define BCSR_SIZE ((uint)(64 * 1024))
#define FLASH_BASE0_PRELIM 0x2800000 /* FLASH bank #0 */
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
-#if 0
+#if 1
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
#else
-#define CONFIG_BOOTDELAY 25 /* autoboot after 5 seconds */
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#endif
//#define CONFIG_BOOTCOMMAND "bootm 04080000 04200000" /* autoboot command*/
-#define CONFIG_BOOTCOMMAND "bootp"
+#define CONFIG_BOOTCOMMAND ""
#define CONFIG_BOOTARGS \
"root=/dev/nfs rw " \
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
-#undef CONFIG_WATCHDOG /* turn on platform specific watchdog */
+#undef CONFIG_WATCHDOG /* turn on platform specific watchdog */
/*
* Miscellaneous configurable options
*/
-#define CFG_LONGHELP /* undef to save memory */
-#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_MEMTEST_START 0x00400000 /* memtest works on */
#define CFG_MEMTEST_END 0x01c00000 /* 4 ... 28 MB in DRAM */
-#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
#define CFG_LOAD_ADDR 0x100000 /* default load address */
-#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*
* Low Level Configuration Settings
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
-#define PHYS_SDRAM_60X 0x00000000 /* SDRAM (60x Bus) */
-#define PHYS_SDRAM_60X_SIZE 0x08000000 /* 128 MB */
+#define PHYS_SDRAM_60X 0x00000000 /* SDRAM (60x Bus) */
+#define PHYS_SDRAM_60X_SIZE 0x08000000 /* 128 MB */
-#define PHYS_SDRAM_LOCAL 0x40000000 /* SDRAM (Local Bus) */
+#define PHYS_SDRAM_LOCAL 0x40000000 /* SDRAM (Local Bus) */
#define PHYS_SDRAM_LOCAL_SIZE 0x04000000 /* 64 MB */
#define PHYS_DPRAM_PCI 0x04000000 /* DPRAM PPC/PCI */
#define PHYS_DPRAM_PCI_SIZE 0x00020000 /* 128 KB */
-#define PHYS_DPRAM_PCI_SEM 0x04020000 /* DPRAM PPC/PCI Semaphore */
+#define PHYS_DPRAM_PCI_SEM 0x04020000 /* DPRAM PPC/PCI Semaphore */
#define PHYS_DPRAM_PCI_SEM_SIZE 0x00000001 /* 1 Byte */
#define PHYS_DPRAM_SHARC 0x04100000 /* DPRAM PPC/Sharc */
#define PHYS_DPRAM_SHARC_SEM 0x04140000 /* DPRAM PPC/Sharc Semaphore */
#define PHYS_DPRAM_SHARC_SEM_SIZE 0x00000001 /* 1 Byte */
-#define PHYS_USB 0x04200000 /* USB Controller (60x Bus) */
-#define PHYS_USB_SIZE 0x00000002 /* 2 Bytes */
+#define PHYS_USB 0x04200000 /* USB Controller (60x Bus) */
+#define PHYS_USB_SIZE 0x00000002 /* 2 Bytes */
-#define PHYS_IMMR 0xF0000000 /* Internal Memory Mapped Reg. */
+#define PHYS_IMMR 0xF0000000 /* Internal Memory Mapped Reg. */
-#define PHYS_FLASH 0xFF000000 /* Flash (60x Bus) */
-#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
+#define PHYS_FLASH 0xFF000000 /* Flash (60x Bus) */
+#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
-#define CFG_IMMR PHYS_IMMR
+#define CFG_IMMR PHYS_IMMR
/* turn off NVRAM env feature */
#undef CONFIG_NVRAM_ENV
* Please note that CFG_SDRAM_BASE _must_ start at 0
*/
#define CFG_SDRAM_BASE PHYS_SDRAM_60X
-#define CFG_FLASH_BASE PHYS_FLASH
-#define CFG_MONITOR_BASE 0x200000
-//#define CFG_MONITOR_BASE 0xfff00000
+#define CFG_FLASH_BASE 0xFFF00000
+//#define CFG_MONITOR_BASE 0x200000
+#define CFG_MONITOR_BASE 0xfff00000
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
/*-----------------------------------------------------------------------
* FLASH organization
*/
-#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
-#define CFG_MAX_FLASH_SECT 63 /* max number of sectors on one chip */
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 63 /* max number of sectors on one chip */
-#define CFG_FLASH_ERASE_TOUT 12000 /* Timeout for Flash Erase (in ms) */
-#define CFG_FLASH_WRITE_TOUT 3000 /* Timeout for Flash Write (in ms) */
+#define CFG_FLASH_ERASE_TOUT 12000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 3000 /* Timeout for Flash Write (in ms) */
#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_OFFSET 0x8000 /* Addr of Environment Sector */
-#define CFG_ENV_SIZE 0x8000 /* Total Size of Environment Sector */
+#define CFG_ENV_ADDR (PHYS_FLASH + 0x8000) /* Addr of Environment Sector */
+#define CFG_ENV_SECT_SIZE 0x8000 /* Total Size of Environment Sector */
/*-----------------------------------------------------------------------
* Cache Configuration
#define PROT_ARP 0x0806 /* IP ARP protocol */
#define PROT_RARP 0x8035 /* IP ARP protocol */
+#define IPPROTO_ICMP 1 /* Internet Control Message Protocol */
+#define IPPROTO_UDP 17 /* User Datagram Protocol */
+
/*
* Internet Protocol (IP) header.
*/
#define ARP_HDR_SIZE (8+20) /* Size assuming ethernet */
+/*
+ * ICMP stuff (just enough to handle (host) redirect messages)
+ */
+#define ICMP_REDIRECT 5 /* Redirect (change route) */
+
+/* Codes for REDIRECT. */
+#define ICMP_REDIR_NET 0 /* Redirect Net */
+#define ICMP_REDIR_HOST 1 /* Redirect Host */
+
+typedef struct icmphdr {
+ uchar type;
+ uchar code;
+ ushort checksum;
+ union {
+ struct {
+ ushort id;
+ ushort sequence;
+ } echo;
+ ulong gateway;
+ struct {
+ ushort __unused;
+ ushort mtu;
+ } frag;
+ } un;
+} ICMP_t;
+
+
/*
* Maximum packet size; used to allocate packet storage.
void pciinfo (int);
#endif
-#if defined(CONFIG_COGENT) || defined(CONFIG_SXNI855T)
+#if defined(CONFIG_COGENT) || defined(CONFIG_SXNI855T) || defined(CONFIG_RSD_PROTO)
/* cogent - $(BOARD)/mb.c */
/* SXNI855T - $(BOARD)/$(BOARD).c */
int misc_init_f (void);
for (i=10; i<16; ++i) {
arp->ar_data[i] = 0; /* dest ET addr = 0 */
}
- *(IPaddr_t *)(&arp->ar_data[16]) = NetServerIP; /* dest IP addr */
+ *(IPaddr_t *)(&arp->ar_data[16]) = /* dest IP addr */
+ (NetOurGatewayIP) ? NetOurGatewayIP /* => Gateway */
+ : NetServerIP; /* => TFTP server */
NetSendPacket(NetTxPacket, ETHER_HDR_SIZE + ARP_HDR_SIZE);
* - REQUEST packets will be answered by sending our
* IP address - if we know it.
* - REPLY packates are expected only after we asked
- * for the TFTP server's ethernet address; so if we
- * receive such a packet, we set the server
- * ethernet address
+ * for the TFTP server's or the gateway's ethernet
+ * address; so if we receive such a packet, we set
+ * the server ethernet address
*/
#ifdef ET_DEBUG
printf("Got ARP\n");
return;
case ARPOP_REPLY: /* set TFTP server eth addr */
#ifdef ET_DEBUG
- printf("Got ARP REPLY, set TFTP server eth addr\n");
+ printf("Got ARP REPLY, set server/gtwy eth addr\n");
#endif
NetCopyEther(NetServerEther, &arp->ar_data[0]);
(*packetHandler)(0,0,0,0); /* start TFTP */
}
if (NetOurIP && ip->ip_dst != NetOurIP)
return;
- if (ip->ip_p != 17) /* Only UDP packets */
- return;
-
-
- /*
- * At this point we still use the ET broadcast
- * address; copy the server ET adress to the req.
- * location. This happens when issuing a TFTP request
- * with the known server IP address and the ET
- * broadcast address as destination.
+ /*
+ * watch for ICMP host redirects
+ *
+ * There is no real handler code (yet). We just watch
+ * for ICMP host redirect messages. In case anybody
+ * sees these messages: please contact me
+ * (wd@denx.de), or - even better - send me the
+ * necessary fixes :-)
+ *
+ * Note: in all cases where I have seen this so far
+ * it was a problem with the router configuration,
+ * for instance when a router was configured in the
+ * BOOTP reply, but the TFTP server was on the same
+ * subnet. So this is probably a warning that your
+ * configuration might be wrong. But I'm not really
+ * sure if there aren't any other situations.
*/
- if (memcmp(NetServerEther, NetBcastAddr, 6) == 0)
- NetCopyEther(NetServerEther, et->et_src);
+ if (ip->ip_p == IPPROTO_ICMP) {
+ ICMP_t *icmph = (ICMP_t *)&(ip->udp_src);
+
+ if (icmph->type != ICMP_REDIRECT)
+ return;
+ if (icmph->code != ICMP_REDIR_HOST)
+ return;
+ puts (" ICMP Host Redirect to ");
+ print_IPaddr(icmph->un.gateway);
+ putc(' ');
+ } else if (ip->ip_p != IPPROTO_UDP) { /* Only UDP packets */
+ return;
+ }
/*
* IP header OK. Pass the packet to the current handler.
static void
TftpHandler (uchar * pkt, unsigned dest, unsigned src, unsigned len)
{
- if (dest != TftpOurPort)
+ if (dest != TftpOurPort) {
return;
- if (TftpState != STATE_RRQ && src != TftpServerPort)
+ }
+ if (TftpState != STATE_RRQ && src != TftpServerPort) {
return;
+ }
- if (len < 2)
+ if (len < 2) {
return;
+ }
len -= 2;
switch (SWAP16(*((ushort *)pkt)++)) {
case TFTP_RRQ:
case TFTP_WRQ:
case TFTP_ACK:
+ break;
default:
break;
projects / users / rw / ppcboot.git / commitdiff