if (!mmget_not_zero(mm)) /* Happens during process shutdown */
                return -ESRCH;
  
-       range = kzalloc(sizeof(*range), GFP_KERNEL);
-       if (unlikely(!range)) {
-               r = -ENOMEM;
-               goto out;
-       }
-       range->notifier = &bo->notifier;
-       range->start = bo->notifier.interval_tree.start;
-       range->end = bo->notifier.interval_tree.last + 1;
-       range->default_flags = HMM_PFN_REQ_FAULT;
-       if (!amdgpu_ttm_tt_is_readonly(ttm))
-               range->default_flags |= HMM_PFN_REQ_WRITE;
- 
-       range->hmm_pfns = kvmalloc_array(ttm->num_pages,
-                                        sizeof(*range->hmm_pfns), GFP_KERNEL);
-       if (unlikely(!range->hmm_pfns)) {
-               r = -ENOMEM;
-               goto out_free_ranges;
-       }
- 
        mmap_read_lock(mm);
 -      vma = find_vma(mm, start);
 -      mmap_read_unlock(mm);
 -      if (unlikely(!vma || start < vma->vm_start)) {
 +      vma = vma_lookup(mm, start);
 +      if (unlikely(!vma)) {
                r = -EFAULT;
 -              goto out_putmm;
 +              goto out_unlock;
        }
        if (unlikely((gtt->userflags & AMDGPU_GEM_USERPTR_ANONONLY) &&
                vma->vm_file)) {
                r = -EPERM;
 -              goto out_putmm;
 +              goto out_unlock;
        }
-       mmap_read_unlock(mm);
-       timeout = jiffies + msecs_to_jiffies(HMM_RANGE_DEFAULT_TIMEOUT);
- 
- retry:
-       range->notifier_seq = mmu_interval_read_begin(&bo->notifier);
- 
-       mmap_read_lock(mm);
-       r = hmm_range_fault(range);
-       mmap_read_unlock(mm);
-       if (unlikely(r)) {
-               /*
-                * FIXME: This timeout should encompass the retry from
-                * mmu_interval_read_retry() as well.
-                */
-               if (r == -EBUSY && !time_after(jiffies, timeout))
-                       goto retry;
-               goto out_free_pfns;
-       }
- 
-       /*
-        * Due to default_flags, all pages are HMM_PFN_VALID or
-        * hmm_range_fault() fails. FIXME: The pages cannot be touched outside
-        * the notifier_lock, and mmu_interval_read_retry() must be done first.
-        */
-       for (i = 0; i < ttm->num_pages; i++)
-               pages[i] = hmm_pfn_to_page(range->hmm_pfns[i]);
- 
-       gtt->range = range;
-       mmput(mm);
- 
-       return 0;
  
 -                                     false);
 -out_putmm:
+       readonly = amdgpu_ttm_tt_is_readonly(ttm);
+       r = amdgpu_hmm_range_get_pages(&bo->notifier, mm, pages, start,
+                                      ttm->num_pages, >t->range, readonly,
- out_free_pfns:
-       kvfree(range->hmm_pfns);
- out_free_ranges:
-       kfree(range);
- out:
++                                     true);
 +out_unlock:
 +      mmap_read_unlock(mm);
        mmput(mm);
+ 
        return r;
  }
  
 
        struct vc4_hdmi *vc4_hdmi = connector_to_vc4_hdmi(connector);
        bool connected = false;
  
-       if (vc4_hdmi->hpd_gpio) {
-               if (gpio_get_value_cansleep(vc4_hdmi->hpd_gpio) ^
-                   vc4_hdmi->hpd_active_low)
-                       connected = true;
 +      WARN_ON(pm_runtime_resume_and_get(&vc4_hdmi->pdev->dev));
 +
+       if (vc4_hdmi->hpd_gpio &&
+           gpiod_get_value_cansleep(vc4_hdmi->hpd_gpio)) {
+               connected = true;
        } else if (drm_probe_ddc(vc4_hdmi->ddc)) {
                connected = true;
        } else if (HDMI_READ(HDMI_HOTPLUG) & VC4_HDMI_HOTPLUG_CONNECTED) {
                return;
        }
  
 -      ret = clk_prepare_enable(vc4_hdmi->hsm_clock);
 -      if (ret) {
 -              DRM_ERROR("Failed to turn on HSM clock: %d\n", ret);
 -              clk_disable_unprepare(vc4_hdmi->pixel_clock);
 -              return;
 -      }
 -
        vc4_hdmi_cec_update_clk_div(vc4_hdmi);
  
-       /*
-        * FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup
-        * at 300MHz.
-        */
-       ret = clk_set_min_rate(vc4_hdmi->pixel_bvb_clock,
-                              (hsm_rate > VC4_HSM_MID_CLOCK ? 150000000 : 75000000));
+       if (pixel_rate > 297000000)
+               bvb_rate = 300000000;
+       else if (pixel_rate > 148500000)
+               bvb_rate = 150000000;
+       else
+               bvb_rate = 75000000;
+ 
+       ret = clk_set_min_rate(vc4_hdmi->pixel_bvb_clock, bvb_rate);
        if (ret) {
                DRM_ERROR("Failed to set pixel bvb clock rate: %d\n", ret);
 -              clk_disable_unprepare(vc4_hdmi->hsm_clock);
                clk_disable_unprepare(vc4_hdmi->pixel_clock);
                return;
        }