drm/msm/dsi_phy_28nm: convert from round_rate() to determine_rate()

The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series. The change to use clamp_t() was
done manually.

Signed-off-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/667872/
Link: https://lore.kernel.org/r/20250810-drm-msm-phy-clk-round-rate-v2-4-0fd1f7979c83@redhat.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
index 90348a2af3e9dac72924561b23b169a268abc3b0..d00e415b9a991cd515e01d78a48ac6fe3e830b04 100644 (file)
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
@@ -533,21 +533,20 @@ static void dsi_pll_28nm_vco_unprepare(struct clk_hw *hw)
        pll_28nm->phy->pll_on = false;
 }
 
-static long dsi_pll_28nm_clk_round_rate(struct clk_hw *hw,
-               unsigned long rate, unsigned long *parent_rate)
+static int dsi_pll_28nm_clk_determine_rate(struct clk_hw *hw,
+                                          struct clk_rate_request *req)
 {
        struct dsi_pll_28nm *pll_28nm = to_pll_28nm(hw);
 
-       if      (rate < pll_28nm->phy->cfg->min_pll_rate)
-               return  pll_28nm->phy->cfg->min_pll_rate;
-       else if (rate > pll_28nm->phy->cfg->max_pll_rate)
-               return  pll_28nm->phy->cfg->max_pll_rate;
-       else
-               return rate;
+       req->rate = clamp_t(unsigned long, req->rate,
+                           pll_28nm->phy->cfg->min_pll_rate,
+                           pll_28nm->phy->cfg->max_pll_rate);
+
+       return 0;
 }
 
 static const struct clk_ops clk_ops_dsi_pll_28nm_vco_hpm = {
-       .round_rate = dsi_pll_28nm_clk_round_rate,
+       .determine_rate = dsi_pll_28nm_clk_determine_rate,
        .set_rate = dsi_pll_28nm_clk_set_rate,
        .recalc_rate = dsi_pll_28nm_clk_recalc_rate,
        .prepare = dsi_pll_28nm_vco_prepare_hpm,
@@ -556,7 +555,7 @@ static const struct clk_ops clk_ops_dsi_pll_28nm_vco_hpm = {
 };
 
 static const struct clk_ops clk_ops_dsi_pll_28nm_vco_lp = {
-       .round_rate = dsi_pll_28nm_clk_round_rate,
+       .determine_rate = dsi_pll_28nm_clk_determine_rate,
        .set_rate = dsi_pll_28nm_clk_set_rate,
        .recalc_rate = dsi_pll_28nm_clk_recalc_rate,
        .prepare = dsi_pll_28nm_vco_prepare_lp,
@@ -565,7 +564,7 @@ static const struct clk_ops clk_ops_dsi_pll_28nm_vco_lp = {
 };
 
 static const struct clk_ops clk_ops_dsi_pll_28nm_vco_8226 = {
-       .round_rate = dsi_pll_28nm_clk_round_rate,
+       .determine_rate = dsi_pll_28nm_clk_determine_rate,
        .set_rate = dsi_pll_28nm_clk_set_rate,
        .recalc_rate = dsi_pll_28nm_clk_recalc_rate,
        .prepare = dsi_pll_28nm_vco_prepare_8226,