const struct imu_firmware_header_v1_0 *imu_hdr = NULL;
        u8 *ucode_addr;
 
-       if (NULL == ucode->fw)
+       if (!ucode->fw)
                return 0;
 
        ucode->mc_addr = mc_addr;
        uint8_t *src_addr = NULL;
        uint8_t *dst_addr = NULL;
 
-       if (NULL == ucode->fw)
+       if (!ucode->fw)
                return 0;
 
        comm_hdr = (const struct common_firmware_header *)ucode->fw->data;
                        if (i == AMDGPU_UCODE_ID_CP_MEC1 &&
                            adev->firmware.load_type != AMDGPU_FW_LOAD_PSP) {
                                const struct gfx_firmware_header_v1_0 *cp_hdr;
+
                                cp_hdr = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data;
                                amdgpu_ucode_patch_jt(ucode,  adev->firmware.fw_buf_mc + fw_offset,
                                                    adev->firmware.fw_buf_ptr + fw_offset);