drm/amd/display: Add FBC on/off to front-end programming

- Fixing text mode for cases when VT-switch doesn't result
in timing change

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
index b3448a41718e0a28df8d313ed40bb890d4be6088..590b2ad3710592e1cc33697086453a64ec924fdd 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
@@ -2554,6 +2554,15 @@ static void dce110_program_front_end_for_pipe(
 
        program_scaler(dc, pipe_ctx);
 
+#ifdef ENABLE_FBC
+       if (dc->fbc_compressor && old_pipe->stream) {
+               if (plane_state->tiling_info.gfx8.array_mode == DC_ARRAY_LINEAR_GENERAL)
+                       dc->fbc_compressor->funcs->disable_fbc(dc->fbc_compressor);
+               else
+                       enable_fbc(dc, dc->current_state);
+       }
+#endif
+
        mi->funcs->mem_input_program_surface_config(
                        mi,
                        plane_state->format,