stmmac: add CSR Clock range selection

This patch adds the CSR Clock range selection.

Original patch from Johannes Stezenbach fixed the CSR
in the stmmac_mdio. We agreed to provide this through
the platform instead of.
Also thanks to Johannes for having tested it on ARM.

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Johannes Stezenbach <js@sig21.net>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/stmmac/stmmac.h b/drivers/net/stmmac/stmmac.h
index d0ddab0d21c227c4a7b69c835acc542e89be054c..12d1cb00c0d72bc22625ef0dcb90b25304b7bf4b 100644 (file)
--- a/drivers/net/stmmac/stmmac.h
+++ b/drivers/net/stmmac/stmmac.h
@@ -78,6 +78,7 @@ struct stmmac_priv {
        unsigned int flow_ctrl;
        unsigned int pause;
        struct mii_bus *mii;
+       int mii_clk_csr;
 
        u32 msg_enable;
        spinlock_t lock;

diff --git a/drivers/net/stmmac/stmmac_main.c b/drivers/net/stmmac/stmmac_main.c
index 03c160c6d75c3c3474a78b4cb1d1dd0d83149121..a169b1441d5051b1156a9b51f03439538e70dbec 100644 (file)
--- a/drivers/net/stmmac/stmmac_main.c
+++ b/drivers/net/stmmac/stmmac_main.c
@@ -1704,6 +1704,7 @@ static int stmmac_dvr_probe(struct platform_device *pdev)
        plat_dat = pdev->dev.platform_data;
        priv->bus_id = plat_dat->bus_id;
        priv->pbl = plat_dat->pbl;      /* TLI */
+       priv->mii_clk_csr = plat_dat->clk_csr;
        priv->is_gmac = plat_dat->has_gmac;     /* GMAC is on board */
        priv->enh_desc = plat_dat->enh_desc;
        priv->ioaddr = addr;

diff --git a/drivers/net/stmmac/stmmac_mdio.c b/drivers/net/stmmac/stmmac_mdio.c
index 03dea1401571e960a822661e15f0fc44402ad572..d7441616357d292a7f67d4777299dd74025a8ca4 100644 (file)
--- a/drivers/net/stmmac/stmmac_mdio.c
+++ b/drivers/net/stmmac/stmmac_mdio.c
@@ -53,7 +53,7 @@ static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)
        int data;
        u16 regValue = (((phyaddr << 11) & (0x0000F800)) |
                        ((phyreg << 6) & (0x000007C0)));
-       regValue |= MII_BUSY;   /* in case of GMAC */
+       regValue |= MII_BUSY | ((priv->mii_clk_csr & 7) << 2);
 
        do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1);
        writel(regValue, priv->ioaddr + mii_address);
@@ -85,7 +85,8 @@ static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
            (((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0)))
            | MII_WRITE;
 
-       value |= MII_BUSY;
+       value |= MII_BUSY | ((priv->mii_clk_csr & 7) << 2);
+
 
        /* Wait until any existing MII operation is complete */
        do {} while (((readl(priv->ioaddr + mii_address)) & MII_BUSY) == 1);

diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index a4adf0de6ed60b880765549c200b97a639d14e3c..c87c88ccffc0464cad4eceae65655aa650b27019 100644 (file)
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -32,6 +32,7 @@
 struct plat_stmmacenet_data {
        int bus_id;
        int pbl;
+       int clk_csr;
        int has_gmac;
        int enh_desc;
        void (*fix_mac_speed)(void *priv, unsigned int speed);