net/mlx5: SHAMPO: Introduce new SHAMPO specific HCA caps

Read and cache SHAMPO specific caps for header data split capabilities.
Will be used in downstream patch.

Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20250109204231.1809851-4-tariqt@nvidia.com
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/fw.c b/drivers/net/ethernet/mellanox/mlx5/core/fw.c
index 76ad46bf477d62eeb4e8d9cc134226432c5b9b7c..b253d1673398dc393df5c3b0139cdba31c754607 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/fw.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/fw.c
@@ -281,6 +281,12 @@ int mlx5_query_hca_caps(struct mlx5_core_dev *dev)
                        return err;
        }
 
+       if (MLX5_CAP_GEN(dev, shampo)) {
+               err = mlx5_core_get_caps_mode(dev, MLX5_CAP_SHAMPO, HCA_CAP_OPMOD_GET_CUR);
+               if (err)
+                       return err;
+       }
+
        return 0;
 }
 

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c
index 220a9ac75c8ba0256f78a0293ef4f65f5e4d48ea..a670e4538a13d08e32dda00c0a04d192a617a757 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c
@@ -368,6 +368,10 @@ int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_ty
        u16 opmod = (cap_type << 1) | (cap_mode & 0x01);
        int err;
 
+       if (WARN_ON(!dev->caps.hca[cap_type]))
+               /* this cap_type must be added to mlx5_hca_caps_alloc() */
+               return -EINVAL;
+
        memset(in, 0, sizeof(in));
        out = kzalloc(out_sz, GFP_KERNEL);
        if (!out)
@@ -1788,6 +1792,7 @@ static const int types[] = {
        MLX5_CAP_MACSEC,
        MLX5_CAP_ADV_VIRTUALIZATION,
        MLX5_CAP_CRYPTO,
+       MLX5_CAP_SHAMPO,
 };
 
 static void mlx5_hca_caps_free(struct mlx5_core_dev *dev)

diff --git a/include/linux/mlx5/device.h b/include/linux/mlx5/device.h
index cc647992f3d1e1d5b6346a126c847042c47e6ea9..0c48b20f818a9e9ca855e9bbf7513e3b68e41c89 100644 (file)
--- a/include/linux/mlx5/device.h
+++ b/include/linux/mlx5/device.h
@@ -1245,6 +1245,7 @@ enum mlx5_cap_type {
        MLX5_CAP_DEV_EVENT = 0x14,
        MLX5_CAP_IPSEC,
        MLX5_CAP_CRYPTO = 0x1a,
+       MLX5_CAP_SHAMPO = 0x1d,
        MLX5_CAP_MACSEC = 0x1f,
        MLX5_CAP_GENERAL_2 = 0x20,
        MLX5_CAP_PORT_SELECTION = 0x25,
@@ -1470,6 +1471,9 @@ enum mlx5_qcam_feature_groups {
 #define MLX5_CAP_MACSEC(mdev, cap)\
        MLX5_GET(macsec_cap, (mdev)->caps.hca[MLX5_CAP_MACSEC]->cur, cap)
 
+#define MLX5_CAP_SHAMPO(mdev, cap) \
+       MLX5_GET(shampo_cap, mdev->caps.hca[MLX5_CAP_SHAMPO]->cur, cap)
+
 enum {
        MLX5_CMD_STAT_OK                        = 0x0,
        MLX5_CMD_STAT_INT_ERR                   = 0x1,

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 221146278ac867b183083cadce1cea559f5cb6b2..d7c91f15273581afd687b37374062792cb3ab91d 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -2327,7 +2327,9 @@ struct mlx5_ifc_wq_bits {
        u8         headers_mkey[0x20];
 
        u8         shampo_enable[0x1];
-       u8         reserved_at_1e1[0x4];
+       u8         reserved_at_1e1[0x1];
+       u8         shampo_mode[0x2];
+       u8         reserved_at_1e4[0x1];
        u8         log_reservation_size[0x3];
        u8         reserved_at_1e8[0x5];
        u8         log_max_num_of_packets_per_reservation[0x3];
@@ -3699,6 +3701,22 @@ struct mlx5_ifc_crypto_cap_bits {
        u8    reserved_at_80[0x780];
 };
 
+struct mlx5_ifc_shampo_cap_bits {
+       u8    reserved_at_0[0x3];
+       u8    shampo_log_max_reservation_size[0x5];
+       u8    reserved_at_8[0x3];
+       u8    shampo_log_min_reservation_size[0x5];
+       u8    shampo_min_mss_size[0x10];
+
+       u8    shampo_header_split[0x1];
+       u8    shampo_header_split_data_merge[0x1];
+       u8    reserved_at_22[0x1];
+       u8    shampo_log_max_headers_entry_size[0x5];
+       u8    reserved_at_28[0x18];
+
+       u8    reserved_at_40[0x7c0];
+};
+
 union mlx5_ifc_hca_cap_union_bits {
        struct mlx5_ifc_cmd_hca_cap_bits cmd_hca_cap;
        struct mlx5_ifc_cmd_hca_cap_2_bits cmd_hca_cap_2;