arm64: dts: ti: k3-j721e: Add PCIe ctrl node to scm_conf region

This region is used for controlling the function of the PCIe IP. It is
compatible with "ti,j784s4-pcie-ctrl", add this here and use it with
the PCIe nodes.

Signed-off-by: Andrew Davis <afd@ti.com>
[j-choudhary@ti.com: Add changes to k3-j721e-evm-pcie1-ep.dtso]
Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20250402113201.151195-3-j-choudhary@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso b/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso
index 4062709d65792f7f6d361c92a1030d1c6749e295..a8a502a6207f668e81889c2e55bc892d869e28fc 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso
+++ b/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie0-ep.dtso
@@ -38,7 +38,7 @@
                reg-names = "intd_cfg", "user_cfg", "reg", "mem";
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>;
-               ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
+               ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>;
                max-link-speed = <3>;
                num-lanes = <1>;
                power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie1-ep.dtso b/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie1-ep.dtso
index a8cccdcf3e3b9a0843d3fe17fe6f8a9bdfee774c..436085157a69debd5607c341b2965f495f68765f 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie1-ep.dtso
+++ b/arch/arm64/boot/dts/ti/k3-j721e-evm-pcie1-ep.dtso
@@ -48,6 +48,6 @@
                dma-coherent;
                phys = <&serdes1_pcie_link>;
                phy-names = "pcie-phy";
-               ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
+               ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
        };
 };

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index af3d730154ac542d1b6cb53da602660dafa605cd..d7263ad4316322302dc66aafc2d7194d7cefcb1f 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -44,6 +44,26 @@
                #size-cells = <1>;
                ranges = <0x0 0x0 0x00100000 0x1c000>;
 
+               pcie0_ctrl: pcie-ctrl@4070 {
+                       compatible = "ti,j784s4-pcie-ctrl", "syscon";
+                       reg = <0x4070 0x4>;
+               };
+
+               pcie1_ctrl: pcie-ctrl@4074 {
+                       compatible = "ti,j784s4-pcie-ctrl", "syscon";
+                       reg = <0x4074 0x4>;
+               };
+
+               pcie2_ctrl: pcie-ctrl@4078 {
+                       compatible = "ti,j784s4-pcie-ctrl", "syscon";
+                       reg = <0x4078 0x4>;
+               };
+
+               pcie3_ctrl: pcie-ctrl@407c {
+                       compatible = "ti,j784s4-pcie-ctrl", "syscon";
+                       reg = <0x407c 0x4>;
+               };
+
                serdes_ln_ctrl: mux-controller@4080 {
                        compatible = "reg-mux";
                        reg = <0x4080 0x50>;
@@ -946,7 +966,7 @@
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>;
                device_type = "pci";
-               ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
+               ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>;
                max-link-speed = <3>;
                num-lanes = <2>;
                power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
@@ -975,7 +995,7 @@
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 330 IRQ_TYPE_EDGE_RISING>;
                device_type = "pci";
-               ti,syscon-pcie-ctrl = <&scm_conf 0x4074>;
+               ti,syscon-pcie-ctrl = <&pcie1_ctrl 0x0>;
                max-link-speed = <3>;
                num-lanes = <2>;
                power-domains = <&k3_pds 240 TI_SCI_PD_EXCLUSIVE>;
@@ -1004,7 +1024,7 @@
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 342 IRQ_TYPE_EDGE_RISING>;
                device_type = "pci";
-               ti,syscon-pcie-ctrl = <&scm_conf 0x4078>;
+               ti,syscon-pcie-ctrl = <&pcie2_ctrl 0x0>;
                max-link-speed = <3>;
                num-lanes = <2>;
                power-domains = <&k3_pds 241 TI_SCI_PD_EXCLUSIVE>;
@@ -1033,7 +1053,7 @@
                interrupt-names = "link_state";
                interrupts = <GIC_SPI 354 IRQ_TYPE_EDGE_RISING>;
                device_type = "pci";
-               ti,syscon-pcie-ctrl = <&scm_conf 0x407c>;
+               ti,syscon-pcie-ctrl = <&pcie3_ctrl 0x0>;
                max-link-speed = <3>;
                num-lanes = <2>;
                power-domains = <&k3_pds 242 TI_SCI_PD_EXCLUSIVE>;