* Finally record data if requested.
         */
        if (record) {
-               addr = 0;
+               struct perf_sample_data data = {
+                       .regs = regs,
+                       .addr = 0,
+               };
+
                if (counter->attr.sample_type & PERF_SAMPLE_ADDR) {
                        /*
                         * The user wants a data address recorded.
                        sdsync = (ppmu->flags & PPMU_ALT_SIPR) ?
                                POWER6_MMCRA_SDSYNC : MMCRA_SDSYNC;
                        if (!(mmcra & MMCRA_SAMPLE_ENABLE) || (mmcra & sdsync))
-                               addr = mfspr(SPRN_SDAR);
+                               data.addr = mfspr(SPRN_SDAR);
                }
-               if (perf_counter_overflow(counter, nmi, regs, addr)) {
+               if (perf_counter_overflow(counter, nmi, &data)) {
                        /*
                         * Interrupts are coming too fast - throttle them
                         * by setting the counter to 0, so it will be
 
  */
 static int intel_pmu_handle_irq(struct pt_regs *regs)
 {
+       struct perf_sample_data data;
        struct cpu_hw_counters *cpuc;
-       struct cpu_hw_counters;
        int bit, cpu, loops;
        u64 ack, status;
 
+       data.regs = regs;
+       data.addr = 0;
+
        cpu = smp_processor_id();
        cpuc = &per_cpu(cpu_hw_counters, cpu);
 
                if (!intel_pmu_save_and_restart(counter))
                        continue;
 
-               if (perf_counter_overflow(counter, 1, regs, 0))
+               if (perf_counter_overflow(counter, 1, &data))
                        intel_pmu_disable_counter(&counter->hw, bit);
        }
 
 
 static int amd_pmu_handle_irq(struct pt_regs *regs)
 {
-       int cpu, idx, handled = 0;
+       struct perf_sample_data data;
        struct cpu_hw_counters *cpuc;
        struct perf_counter *counter;
        struct hw_perf_counter *hwc;
+       int cpu, idx, handled = 0;
        u64 val;
 
+       data.regs = regs;
+       data.addr = 0;
+
        cpu = smp_processor_id();
        cpuc = &per_cpu(cpu_hw_counters, cpu);
 
                if (!x86_perf_counter_set_period(counter, hwc, idx))
                        continue;
 
-               if (perf_counter_overflow(counter, 1, regs, 0))
+               if (perf_counter_overflow(counter, 1, &data))
                        amd_pmu_disable_counter(hwc, idx);
        }
 
 
        return task_pid_nr_ns(p, counter->ns);
 }
 
-static void perf_counter_output(struct perf_counter *counter,
-                               int nmi, struct pt_regs *regs, u64 addr)
+static void perf_counter_output(struct perf_counter *counter, int nmi,
+                               struct perf_sample_data *data)
 {
        int ret;
        u64 sample_type = counter->attr.sample_type;
        header.size = sizeof(header);
 
        header.misc = PERF_EVENT_MISC_OVERFLOW;
-       header.misc |= perf_misc_flags(regs);
+       header.misc |= perf_misc_flags(data->regs);
 
        if (sample_type & PERF_SAMPLE_IP) {
-               ip = perf_instruction_pointer(regs);
+               ip = perf_instruction_pointer(data->regs);
                header.type |= PERF_SAMPLE_IP;
                header.size += sizeof(ip);
        }
        }
 
        if (sample_type & PERF_SAMPLE_CALLCHAIN) {
-               callchain = perf_callchain(regs);
+               callchain = perf_callchain(data->regs);
 
                if (callchain) {
                        callchain_size = (1 + callchain->nr) * sizeof(u64);
                perf_output_put(&handle, time);
 
        if (sample_type & PERF_SAMPLE_ADDR)
-               perf_output_put(&handle, addr);
+               perf_output_put(&handle, data->addr);
 
        if (sample_type & PERF_SAMPLE_ID)
                perf_output_put(&handle, counter->id);
  * Generic counter overflow handling.
  */
 
-int perf_counter_overflow(struct perf_counter *counter,
-                         int nmi, struct pt_regs *regs, u64 addr)
+int perf_counter_overflow(struct perf_counter *counter, int nmi,
+                         struct perf_sample_data *data)
 {
        int events = atomic_read(&counter->event_limit);
        int throttle = counter->pmu->unthrottle != NULL;
                        perf_counter_disable(counter);
        }
 
-       perf_counter_output(counter, nmi, regs, addr);
+       perf_counter_output(counter, nmi, data);
        return ret;
 }
 
 static enum hrtimer_restart perf_swcounter_hrtimer(struct hrtimer *hrtimer)
 {
        enum hrtimer_restart ret = HRTIMER_RESTART;
+       struct perf_sample_data data;
        struct perf_counter *counter;
-       struct pt_regs *regs;
        u64 period;
 
        counter = container_of(hrtimer, struct perf_counter, hw.hrtimer);
        counter->pmu->read(counter);
 
-       regs = get_irq_regs();
+       data.addr = 0;
+       data.regs = get_irq_regs();
        /*
         * In case we exclude kernel IPs or are somehow not in interrupt
         * context, provide the next best thing, the user IP.
         */
-       if ((counter->attr.exclude_kernel || !regs) &&
+       if ((counter->attr.exclude_kernel || !data.regs) &&
                        !counter->attr.exclude_user)
-               regs = task_pt_regs(current);
+               data.regs = task_pt_regs(current);
 
-       if (regs) {
-               if (perf_counter_overflow(counter, 0, regs, 0))
+       if (data.regs) {
+               if (perf_counter_overflow(counter, 0, &data))
                        ret = HRTIMER_NORESTART;
        }
 
 static void perf_swcounter_overflow(struct perf_counter *counter,
                                    int nmi, struct pt_regs *regs, u64 addr)
 {
+       struct perf_sample_data data = {
+               .regs = regs,
+               .addr = addr,
+       };
+
        perf_swcounter_update(counter);
        perf_swcounter_set_period(counter);
-       if (perf_counter_overflow(counter, nmi, regs, addr))
+       if (perf_counter_overflow(counter, nmi, &data))
                /* soft-disable the counter */
                ;