mmc: debugfs: expose the SDCLK frq in sys ios

This patch is to expose the actual SDCLK frequency in
/sys/kernel/debug/mmcX/ios entry.

For example, if the max clk for a normal speed card is 20MHz this
is reported in /sys/kernel/debug/mmcX/ios.  Unfortunately the actual
SDCLK frequency (i.e. Baseclock / divisor) is not reported at all:
for example, in that case, on Arasan HC, it should be 48/4=12 (MHz).

Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>

diff --git a/drivers/mmc/core/debugfs.c b/drivers/mmc/core/debugfs.c
index 3923880118b64d0519d7eb00d084e9709b271b59..027615d3bf3e2b6c11af895d79906281816c5182 100644 (file)
--- a/drivers/mmc/core/debugfs.c
+++ b/drivers/mmc/core/debugfs.c
@@ -57,6 +57,8 @@ static int mmc_ios_show(struct seq_file *s, void *data)
        const char *str;
 
        seq_printf(s, "clock:\t\t%u Hz\n", ios->clock);
+       if (host->actual_clock)
+               seq_printf(s, "actual clock:\t%u Hz\n", host->actual_clock);
        seq_printf(s, "vdd:\t\t%u ", ios->vdd);
        if ((1 << ios->vdd) & MMC_VDD_165_195)
                seq_printf(s, "(1.65 - 1.95 V)\n");

diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 19ed580f2cabf2fca09ae59d52cb86f5265f9ab8..a7c23118dab228a5d6bd07b6a32e8d534a612250 100644 (file)
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1066,12 +1066,15 @@ static void sdhci_finish_command(struct sdhci_host *host)
 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 {
        int div = 0; /* Initialized for compiler warning */
+       int real_div = div, clk_mul = 1;
        u16 clk = 0;
        unsigned long timeout;
 
        if (clock == host->clock)
                return;
 
+       host->mmc->actual_clock = 0;
+
        if (host->ops->set_clock) {
                host->ops->set_clock(host, clock);
                if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK)
@@ -1109,6 +1112,8 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
                                 * Control register.
                                 */
                                clk = SDHCI_PROG_CLOCK_MODE;
+                               real_div = div;
+                               clk_mul = host->clk_mul;
                                div--;
                        }
                } else {
@@ -1122,6 +1127,7 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
                                                break;
                                }
                        }
+                       real_div = div;
                        div >>= 1;
                }
        } else {
@@ -1130,9 +1136,13 @@ static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
                        if ((host->max_clk / div) <= clock)
                                break;
                }
+               real_div = div;
                div >>= 1;
        }
 
+       if (real_div)
+               host->mmc->actual_clock = (host->max_clk * clk_mul) / real_div;
+
        clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT;
        clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN)
                << SDHCI_DIVIDER_HI_SHIFT;

diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h
index a3ac9c48e5de60dc71fe71f3eb5d067e315ac4fb..cea064f73514bd118b4c5e1e48d44cd2711e4b9d 100644 (file)
--- a/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@ -323,6 +323,8 @@ struct mmc_host {
        struct fault_attr       fail_mmc_request;
 #endif
 
+       unsigned int            actual_clock;   /* Actual HC clock rate */
+
        unsigned long           private[0] ____cacheline_aligned;
 };