arm64: dts: qcom: sc7280: Configure SPI-NOR FLASH for sc7280-idp

Add spi-nor flash node and pinctrl configurations for the SC7280 IDP.

Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1632399378-12229-4-git-send-email-rajpat@codeaurora.org

diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index feb50639ad769fd57f512ab7ce6c273b2c414f2d..52974796d69efd2806f4d6dd4597b285c2b3046a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -232,6 +232,20 @@
        vcc-supply = <&vreg_l1c_1p8>;
 };
 
+&qspi {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&qspi_clk>, <&qspi_cs0>, <&qspi_data01>;
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <37500000>;
+               spi-tx-bus-width = <2>;
+               spi-rx-bus-width = <2>;
+       };
+};
+
 &qupv3_id_0 {
        status = "okay";
 };
@@ -320,6 +334,19 @@
        };
 };
 
+&qspi_cs0 {
+       bias-disable;
+};
+
+&qspi_clk {
+       bias-disable;
+};
+
+&qspi_data01 {
+       /* High-Z when no transfers; nice to park the lines */
+       bias-pull-up;
+};
+
 &qup_uart5_default {
        tx {
                pins = "gpio46";