* Support for GESPAC PCIPPC2 board
+* Patch by Denis Peter, 18 Jan 2002:
+ - Support for QNX images
+ - Cleanup of MPL files
+
+* Fix Sandpoint8240 port: working now from flash, without need for DINK
+
+* Unified speed.c for all 824x boards
+ Patch by Greg Allen, 17 Jan 2002
+
* added command to switch LSB on LWMON boards
* increased IDE_TIME_OUT as needed on some boards
* Fix bug in interrupt handling in Walnut flash driver
Patch by Andrew May, 10 Jan 2002
-* Fix Sandpoint8240 port: boots now from flash, without need for DINK
-
* "Final" fix for HUSH shell
* Fix IDE on BAB750 board
LIB = lib$(BOARD).a
-OBJS = $(BOARD).o flash.o ns16550.o serial.o speed.o dc2114x.o
+OBJS = $(BOARD).o flash.o ns16550.o serial.o dc2114x.o
$(LIB): .depend $(OBJS)
$(AR) crv $@ $^
+++ /dev/null
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppcboot.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-
-static char pll_to_bus_factor[] =
-{
- 3, 0, 0, 0, 0,
- 0, 0, 0, 1, 0,
- 0, 0, 2, 0, 2,
- 0, 3, 0, 0, 0,
- 2, 0, 0, 0
-};
-
-#define PLL_STATE_REG 0xFE80002F
-
-ulong get_bus_freq(ulong ignore)
-{
- unsigned char pll = *(volatile char *) (PLL_STATE_REG);
-
- if (pll == 24)
- {
- return CONFIG_SYS_CLK_FREQ * 5 / 2;
- }
- else
- {
- return CONFIG_SYS_CLK_FREQ * pll_to_bus_factor[pll];
- }
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Measure CPU clock speed
- */
-
-/* Table to convert pllratio to actual processor clock scaling factor (*10)
- */
-#ifdef CONFIG_MPC824X
-short pllratio_to_factor[] = {
- 00, 00, 00, 10, 20, 20, 25, 00, 00, 00, 00, 00, 00, 00, 00, 00,
- 00, 00, 00, 10, 00, 00, 00, 45, 30, 00, 40, 00, 00, 00, 35, 00,
-};
-#endif
-
-ulong get_gclk_freq(void)
-{
- uint hid1 = mfspr(HID1);
-
-#ifdef CONFIG_MPC824X
-
- /* 5 bits for PLL ration on 824X
- */
- hid1 = (hid1 >> (32-5)) & 0x1f;
-#else
-
- /* 4 bits on everythings else
- */
- hid1 = (hid1 >> (32-4)) & 0xf;
-#endif
-
- return (pllratio_to_factor[hid1] * get_bus_freq(0)) / 10;
-}
-
-/* ------------------------------------------------------------------------- */
-
LIB = lib$(BOARD).a
-OBJS = $(BOARD).o ns16550.o serial.o speed.o dc2114x.o\
+OBJS = $(BOARD).o ns16550.o serial.o dc2114x.o\
m48t59y.o pci.o flash.o
#pci.o
+++ /dev/null
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppcboot.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-
-
-ulong get_bus_freq(ulong ignore)
-{
- return 33000000; /* On Mousse, PCI is at least 33Mhz */
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Measure CPU clock speed
- */
-
-/* Table to convert pllratio to actual processor clock scaling factor (*10)
- */
-#ifdef CONFIG_MPC824X
-short pllratio_to_factor[] = {
- 00, 00, 00, 10, 20, 20, 25, 00, 00, 00, 00, 00, 00, 00, 00, 00,
- 00, 00, 00, 10, 00, 00, 00, 45, 60, 00, 40, 00, 00, 00, 35, 00,
-};
-#endif
-
-ulong get_gclk_freq(void)
-{
- uint hid1 = mfspr(HID1);
-
-#ifdef CONFIG_MPC824X
-
- /* 5 bits for PLL ration on 824x
- */
- hid1 = (hid1 >> (32-5)) & 0x1f;
-#else
-
- /* 4 bits on everythings else
- */
- hid1 = (hid1 >> (32-4)) & 0xf;
-#endif
- return (pllratio_to_factor[hid1] * get_bus_freq(0)) / 10;
-}
-
-/* ------------------------------------------------------------------------- */
-
--- /dev/null
+/*
+ * (C) Copyright 2001
+ * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <ppcboot.h>
+#include <command.h>
+#include "common_util.h"
+#include <asm/processor.h>
+
+extern int gunzip (void *, int, unsigned char *, int *);
+extern int mem_test(unsigned long start, unsigned long ramsize, int quiet);
+
+#define I2C_BACKUP_ADDR 0x7C00 /* 0x200 bytes for backup */
+#define IMAGE_SIZE 0x80000
+
+extern flash_info_t flash_info[]; /* info for FLASH chips */
+
+image_header_t header;
+
+
+
+int mpl_prg(unsigned long src,unsigned long size)
+{
+ unsigned long start;
+ flash_info_t *info;
+ int i,rc;
+ unsigned long *magic = (unsigned long *)src;
+
+ info = &flash_info[0];
+ start = 0 - size;
+ for(i=info->sector_count-1;i>0;i--)
+ {
+ info->protect[i] = 0; /* unprotect this sector */
+ if(start>=info->start[i])
+ break;
+ }
+ /* set-up flash location */
+ /* now erase flash */
+ if(magic[0]!=IH_MAGIC) {
+ printf("Bad Magic number\n");
+ return -1;
+ }
+ printf("Erasing at %lx (sector %d) (start %lx)\n",
+ start,i,info->start[i]);
+ flash_erase (info, i, info->sector_count-1);
+ printf("flash erased, programming from 0x%lx 0x%lx Bytes\n",src,size);
+ switch (rc = flash_write ((uchar *)src, start, size))
+ {
+ case 0: printf ("OK programming done\n"); return 0;
+ case 1: printf ("ERROR Timeout writing to Flash\n"); return 1;
+ case 2: printf ("ERROR Flash not Erased\n"); return 1;
+ case 4: printf ("ERROR Can't write to protected Flash sectors\n"); return 1;
+ case 8: printf ("ERROR Outside available Flash\n"); return 1;
+ default: printf ("ERROR %s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc); return 1;
+ }
+ return 1;
+}
+
+
+int mpl_prg_image(unsigned long load_addr)
+{
+ unsigned long data,len,checksum;
+ image_header_t *hdr=&header;
+ /* Copy header so we can blank CRC field for re-calculation */
+ memcpy (&header, (char *)load_addr, sizeof(image_header_t));
+ if (hdr->ih_magic != IH_MAGIC) {
+ printf ("Bad Magic Number\n");
+ return 1;
+ }
+ print_image_hdr(hdr);
+ if (hdr->ih_os != IH_OS_PPCBOOT) {
+ printf ("No PPCBOOT Image\n");
+ return 1;
+ }
+ if (hdr->ih_type != IH_TYPE_FIRMWARE) {
+ printf ("No Firmware Image\n");
+ return 1;
+ }
+ data = (ulong)&header;
+ len = sizeof(image_header_t);
+ checksum = hdr->ih_hcrc;
+ hdr->ih_hcrc = 0;
+ if (crc32 (0, (char *)data, len) != checksum) {
+ printf ("Bad Header Checksum\n");
+ return 1;
+ }
+ data = load_addr + sizeof(image_header_t);
+ len = hdr->ih_size;
+ printf ("Verifying Checksum ... ");
+ if (crc32 (0, (char *)data, len) != hdr->ih_dcrc) {
+ printf ("Bad Data CRC\n");
+ return 1;
+ }
+ switch (hdr->ih_comp) {
+ case IH_COMP_NONE:
+ break;
+ case IH_COMP_GZIP:
+ printf (" Uncompressing ... ");
+ if (gunzip ((void *)(data+0x100000), 0x400000,
+ (uchar *)data, (int *)&len) != 0) {
+ printf ("GUNZIP ERROR\n");
+ return 1;
+ }
+ data+=0x100000;
+ break;
+ default:
+ printf (" Unimplemented compression type %d\n", hdr->ih_comp);
+ return 1;
+ }
+
+ printf (" OK\n");
+ return(mpl_prg(data,len));
+}
+
+
+void get_backup_values(backup_t *buf)
+{
+ eeprom_read(CFG_DEF_EEPROM_ADDR, I2C_BACKUP_ADDR,(void *)buf,sizeof(backup_t));
+}
+
+void set_backup_values(int overwrite)
+{
+ backup_t back;
+ int i;
+
+ get_backup_values(&back);
+ if(!overwrite) {
+ if(strncmp(back.signature,"MPL\0",4)==0) {
+ printf("Not possible to write Backup\n");
+ return;
+ }
+ }
+ memcpy(back.signature,"MPL\0",4);
+ i=getenv_r("serial#",back.serial_name,16);
+ if(i==0) {
+ printf("Not possible to write Backup\n");
+ return;
+ }
+ back.serial_name[16]=0;
+ i=getenv_r("ethaddr",back.eth_addr,20);
+ if(i==0) {
+ printf("Not possible to write Backup\n");
+ return;
+ }
+ back.eth_addr[20]=0;
+ eeprom_write(CFG_DEF_EEPROM_ADDR, I2C_BACKUP_ADDR,(void *)&back,sizeof(backup_t));
+}
+
+void clear_env_values(void)
+{
+ backup_t back;
+ unsigned char env_crc[4];
+
+ memset(&back,0xff,sizeof(backup_t));
+ memset(env_crc,0x00,4);
+ eeprom_write(CFG_DEF_EEPROM_ADDR,I2C_BACKUP_ADDR,(void *)&back,sizeof(backup_t));
+ eeprom_write(CFG_DEF_EEPROM_ADDR,CFG_ENV_OFFSET,(void *)env_crc,4);
+}
+
+/* ------------------------------------------------------------------------- */
+
+ /* switches the cs0 and the cs1 to the locations.
+ When boot is TRUE, the the mapping is switched
+ to the boot configuration, If it is FALSE, the
+ flash will be switched in the boot area */
+
+#undef SW_CS_DBG
+#ifdef SW_CS_DBG
+#define SW_CS_PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define SW_CS_PRINTF(fmt,args...)
+#endif
+
+
+int switch_cs(unsigned char boot)
+{
+ unsigned long pbcr;
+ mtdcr(ebccfga, pb0cr); /* get cs0 config reg */
+ pbcr = mfdcr(ebccfgd);
+ if((pbcr&0x00002000)==0) {
+ /* we need only to switch if boot from MPS */
+ /*printf(" MPS boot mode detected. ");*/
+ /* printf("cs0 cfg: %lx\n",pbcr); */
+ if(boot) {
+ /* switch to boot configuration */
+ /* this is a 8bit boot, switch cs0 to flash location */
+ SW_CS_PRINTF("switch to boot mode (MPS on High address\n");
+ pbcr&=0x000FFFFF; /*mask base address of the cs0 */
+ pbcr|=(FLASH_BASE0_PRELIM & 0xFFF00000);
+ mtdcr(ebccfga, pb0cr);
+ mtdcr(ebccfgd, pbcr);
+ SW_CS_PRINTF(" new cs0 cfg: %lx\n",pbcr);
+ mtdcr(ebccfga, pb1cr); /* get cs1 config reg (flash) */
+ pbcr = mfdcr(ebccfgd);
+ SW_CS_PRINTF(" old cs1 cfg: %lx\n",pbcr);
+ pbcr&=0x000FFFFF; /*mask base address of the cs1 */
+ pbcr|=(MULTI_PURPOSE_SOCKET_ADDR & 0xFFF00000);
+ mtdcr(ebccfga, pb1cr);
+ mtdcr(ebccfgd, pbcr);
+ SW_CS_PRINTF(" new cs1 cfg: %lx, MPS is on High Address\n",pbcr);
+ }
+ else
+ {
+ /* map flash to boot area, */
+ SW_CS_PRINTF("map Flash to boot area\n");
+ pbcr&=0x000FFFFF; /*mask base address of the cs0 */
+ pbcr|=(MULTI_PURPOSE_SOCKET_ADDR & 0xFFF00000);
+ mtdcr(ebccfga, pb0cr);
+ mtdcr(ebccfgd, pbcr);
+ SW_CS_PRINTF(" new cs0 cfg: %lx\n",pbcr);
+ mtdcr(ebccfga, pb1cr); /* get cs1 config reg (flash) */
+ pbcr = mfdcr(ebccfgd);
+ SW_CS_PRINTF(" cs1 cfg: %lx\n",pbcr);
+ pbcr&=0x000FFFFF; /*mask base address of the cs1 */
+ pbcr|=(FLASH_BASE0_PRELIM & 0xFFF00000);
+ mtdcr(ebccfga, pb1cr);
+ mtdcr(ebccfgd, pbcr);
+ SW_CS_PRINTF(" new cs1 cfg: %lx Flash is on High Address\n",pbcr);
+ }
+ return 1;
+ }
+ else {
+ SW_CS_PRINTF("Normal boot, no switching necessary\n");
+ return 0;
+ }
+}
+
+
+int do_mplcommon(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+{
+ ulong size,src,load_addr;
+ int result;
+ backup_t back;
+ src = MULTI_PURPOSE_SOCKET_ADDR;
+ size = IMAGE_SIZE;
+
+ if (strcmp(argv[1], "flash") == 0)
+ {
+#if (CONFIG_COMMANDS & CFG_CMD_FDC)
+ if (strcmp(argv[2], "floppy") == 0) {
+ char *local_args[3];
+ extern int do_fdcboot (cmd_tbl_t *, bd_t *, int, int, char *[]);
+ printf ("\nupdating bootloader image from floppy\n");
+ local_args[0] = argv[0];
+ if(argc==4) {
+ local_args[1] = argv[3];
+ local_args[2] = NULL;
+ load_addr=simple_strtoul(argv[3], NULL, 16);
+ result=do_fdcboot(cmdtp, bd, 0, 2, local_args);
+ }
+ else {
+ local_args[1] = NULL;
+ load_addr=CFG_LOAD_ADDR;
+ result=do_fdcboot(cmdtp, bd, 0, 1, local_args);
+ }
+ result=mpl_prg_image(load_addr);
+ return result;
+ }
+#endif /* (CONFIG_COMMANDS & CFG_CMD_FDC) */
+ if (strcmp(argv[2], "mem") == 0) {
+ if(argc==4) {
+ load_addr=simple_strtoul(argv[3], NULL, 16);
+ }
+ else {
+ load_addr=CFG_LOAD_ADDR;
+ }
+ printf ("\nupdating bootloader image from memory at %lX\n",load_addr);
+ result=mpl_prg_image(load_addr);
+ return result;
+ }
+ if (strcmp(argv[2], "mps") == 0) {
+ printf ("\nupdating bootloader image from MSP\n");
+ result=mpl_prg(src,size);
+ return result;
+ }
+
+ }
+ if (strcmp(argv[1], "mem") == 0)
+ {
+ result=0;
+ if(argc==3)
+ {
+ result = (int)simple_strtol(argv[2], NULL, 16);
+ }
+ src=(unsigned long)&result;
+ src-=CFG_MEMTEST_START;
+ src-=(100*1024); /* - 100k */
+ src&=0xfff00000;
+ size=0;
+ do {
+ size++;
+ printf("\n\nPass %ld\n",size);
+ mem_test(CFG_MEMTEST_START,src,1);
+ if(ctrlc())
+ break;
+ if(result>0)
+ result--;
+
+ }while(result);
+ return 0;
+ }
+ if (strcmp(argv[1], "clearenvvalues") == 0)
+ {
+ if (strcmp(argv[2], "yes") == 0)
+ {
+ clear_env_values();
+ return 0;
+ }
+ }
+ if (strcmp(argv[1], "getback") == 0) {
+ get_backup_values(&back);
+ back.signature[3]=0;
+ back.serial_name[16]=0;
+ back.eth_addr[20]=0;
+ printf("GetBackUp: signature: %s\n",back.signature);
+ printf(" serial#: %s\n",back.serial_name);
+ printf(" ethaddr: %s\n",back.eth_addr);
+ return 0;
+ }
+ if (strcmp(argv[1], "setback") == 0) {
+ set_backup_values(1);
+ return 0;
+ }
+#if 0
+ if (strcmp(argv[1], "test") == 0) {
+ char *local_args[6];
+ int i;
+ extern int do_doc(cmd_tbl_t *, bd_t *, int, int, char *[]);
+ local_args[0] = argv[0];
+ for(i=1;i<5;i++) {
+ if(i+1<argc) {
+ local_args[i]=argv[i+1];
+ }
+ else {
+ local_args[i]=NULL;
+ }
+ }
+ local_args[5]=NULL;
+ result=do_doc(cmdtp, bd, 0, argc-1, local_args);
+ return 0;
+ }
+ if (strcmp(argv[1], "test1") == 0) {
+ char *local_args[6];
+ int i;
+ extern int do_docboot(cmd_tbl_t *, bd_t *, int, int, char *[]);
+ local_args[0] = argv[0];
+ for(i=1;i<5;i++) {
+ if(i+1<argc) {
+ local_args[i]=argv[i+1];
+ }
+ else {
+ local_args[i]=NULL;
+ }
+ }
+ local_args[5]=NULL;
+ result=do_docboot(cmdtp, bd, 0, argc-1, local_args);
+ return 0;
+ }
+#endif
+ printf("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+}
+
+
--- /dev/null
+/*
+ * (C) Copyright 2001
+ * Denis Peter, MPL AG Switzerland, d.peter@mpl.ch
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#ifndef _COMMON_UTIL_H_
+#define _COMMON_UTIL_H_
+
+typedef struct {
+ char signature[4];
+ char serial_name[17]; /* "MIP405_1000xxxxx" */
+ char eth_addr[21]; /* "00:60:C2:0a:00:00" */
+} backup_t;
+
+int mpl_prg(unsigned long src,unsigned long size);
+int mpl_prg_image(unsigned long load_addr);
+void get_backup_values(backup_t *buf);
+void set_backup_values(int overwrite);
+void clear_env_values(void);
+int switch_cs(unsigned char boot);
+
+
+#endif /* _COMMON_UTIL_H_ */
+
#ifdef CONFIG_MIP405
#include "../mip405/mip405.h"
#endif
+#include "common_util.h"
flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
/*-----------------------------------------------------------------------
prog++;
printf(".");
}
- sprintf(dispbuf,"\n\nMemory Test: addr = 0x%lx size = 0x%lx\n",startaddr,size);
+ sprintf(dispbuf,"\nMemory Test: addr = 0x%lx size = 0x%lx\n",startaddr,size);
testm_puts(quiet,dispbuf);
for(stage=0;stage<TEST_STAGES;stage++){
sprintf(dispbuf,test_stage[stage].test_write_desc);
{0x8086,0x7110, 0xff,0, {
{PCI_CFG_PIIX4_SERIRQ, 0xD0, 1},/* enable Continous SERIRQ Pin */
{PCI_CFG_PIIX4_GENCFG, 0x00010000, 4},/* enable SERIRQs */
- {PCI_CFG_PIIX4_XBCS, 0x0080, 2}, /* disable all peri CS */
+ {PCI_CFG_PIIX4_XBCS, 0x02C4, 2}, /* disable all peri CS */
{PCI_CFG_PIIX4_RTCCFG, 0x21, 1}, /* enable RTC */
{0xFFFF, 0,0}} /* end of device table */
},
LIB = lib$(BOARD).a
-OBJS = $(BOARD).o ../common/flash.o cmd_mip405.o ../common/pci.o ../common/usb_uhci.o ../common/memtst.o
+OBJS = $(BOARD).o ../common/flash.o cmd_mip405.o ../common/pci.o \
+ ../common/usb_uhci.o ../common/memtst.o ../common/common_util.o
+
SOBJS = init.o
$(LIB): $(OBJS) $(SOBJS)
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
- * hacked for PIP405
+ * hacked for MIP405
*/
#include <ppcboot.h>
#include <command.h>
#include "mip405.h"
-#include <rtc.h>
-#include "../common/isa.h"
-#include "../common/video.h"
-#include <i2c.h>
-
-extern flash_info_t flash_info[]; /* info for FLASH chips */
+#include "../common/common_util.h"
-int PCI_Write_CFG_Reg(int BusDevFunc, int Reg, unsigned int Value, int Width);
-unsigned int PCI_Read_CFG_Reg(int BusDevFunc, int Reg, int Width);
-extern void print_mip405_info(void);
-
-
-
-
-
-#define TRUE 1
-#define FALSE 0
-
-#define IMAGE_SIZE 0x80000
-
-image_header_t header;
-
-
-
-int mip405_prg(unsigned long src,unsigned long size)
-{
- unsigned long start;
- flash_info_t *info;
- int i,rc;
- unsigned long *magic = (unsigned long *)src;
-
- info = &flash_info[0];
- start = 0 - size;
- for(i=info->sector_count-1;i>0;i--)
- {
- info->protect[i] = 0; /* unprotect this sector */
- if(start>=info->start[i])
- break;
- }
- /* set-up flash location */
- /* now erase flash */
- if(magic[0]!=IH_MAGIC) {
- printf("Bad Magic number\n");
- return -1;
- }
- printf("Start erasing at %lx (sector %d) (start %lx)\n",
- start,i,info->start[i]);
- flash_erase (info, i, info->sector_count-1);
- printf("flash erased, programming from 0x%lx 0x%lx Bytes\n",src,size);
- switch (rc = flash_write ((uchar *)src, start, size))
- {
- case 0: printf ("programming done\n"); return 0;
- case 1: printf ("Timeout writing to Flash\n"); return 1;
- case 2: printf ("Flash not Erased\n"); return 1;
- case 4: printf ("Can't write to protected Flash sectors\n"); return 1;
- case 8: printf ("Outside available Flash\n"); return 1;
- default: printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc); return 1;
- }
- return 1;
-}
-
-
-int mip405_prg_image(unsigned long load_addr)
-{
- unsigned long data,len,checksum;
- image_header_t *hdr=&header;
- /* Copy header so we can blank CRC field for re-calculation */
- memcpy (&header, (char *)load_addr, sizeof(image_header_t));
- if (hdr->ih_magic != IH_MAGIC) {
- printf ("Bad Magic Number\n");
- return 1;
- }
- if (hdr->ih_os != IH_OS_PPCBOOT) {
- printf ("No PPCBOOT Image\n");
- return 1;
- }
- if (hdr->ih_type != IH_TYPE_FIRMWARE) {
- printf ("No Firmware Image\n");
- return 1;
- }
- data = (ulong)&header;
- len = sizeof(image_header_t);
- checksum = hdr->ih_hcrc;
- hdr->ih_hcrc = 0;
- if (crc32 (0, (char *)data, len) != checksum) {
- printf ("Bad Header Checksum\n");
- return 1;
- }
- data = load_addr + sizeof(image_header_t);
- len = hdr->ih_size;
- printf (" Verifying Checksum ... ");
- if (crc32 (0, (char *)data, len) != hdr->ih_dcrc) {
- printf ("Bad Data CRC\n");
- return 1;
- }
- printf ("OK\n");
- return(mip405_prg(data,len));
-}
+extern void print_mip405_info(void);
+extern int do_mplcommon(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]);
/* ------------------------------------------------------------------------- */
int do_mip405(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
{
- ulong size,src,device,load_addr;
- int result;
- backup_t back;
- src = MULTI_PURPOSE_SOCKET_ADDR;
- size = IMAGE_SIZE;
+ ulong led_on;
- if (strcmp(argv[1], "flash") == 0)
- {
- if (strcmp(argv[2], "mem") == 0) {
- if(argc==4) {
- load_addr=simple_strtoul(argv[3], NULL, 16);
- }
- else {
- load_addr=CFG_LOAD_ADDR;
- }
- printf ("\nupdating bootloader image from memory at %lX\n",load_addr);
- result=mip405_prg_image(load_addr);
- return result;
- }
- if (strcmp(argv[2], "mps") == 0) {
- printf ("\nupdating bootloader image from MSP\n");
- result=mip405_prg(src,size);
- return result;
- }
-
- }
- if (strcmp(argv[1], "mem") == 0)
- {
- result=0;
- if(argc==3)
- {
- result = (int)simple_strtol(argv[2], NULL, 16);
- }
- src=(unsigned long)&result;
- src-=CFG_MEMTEST_START;
- src-=(100*1024); /* - 100k */
- src&=0xfff00000;
- size=0;
- do {
- size++;
- printf("Pass %ld\n",size);
- mem_test(CFG_MEMTEST_START,src,1);
- if(ctrlc())
- break;
- if(result>0)
- result--;
-
- }while(result);
- return 0;
- }
- if (strcmp(argv[1], "info") == 0)
+ if (strcmp(argv[1], "info") == 0)
{
print_mip405_info();
return 0;
}
if (strcmp(argv[1], "led") == 0)
{
- device = (ulong)simple_strtoul(argv[2], NULL, 10);
- user_led0((device==1));
+ led_on = (ulong)simple_strtoul(argv[2], NULL, 10);
+ user_led0(led_on);
return 0;
}
- if (strcmp(argv[1], "getback") == 0) {
- get_backup_values(&back);
- back.signature[3]=0;
- back.serial_name[16]=0;
- back.eth_addr[20]=0;
- printf("GetBackUp: signature: %s\n",back.signature);
- printf(" serial#: %s\n",back.serial_name);
- printf(" ethaddr: %s\n",back.eth_addr);
- return 0;
- }
- if (strcmp(argv[1], "setback") == 0) {
- set_backup_values(1);
- return 0;
- }
- printf("Usage:\n%s\n", cmdtp->usage);
- return 1;
+ return (do_mplcommon(cmdtp, bd, flag, argc, argv));
}
/* ------------------------------------------------------------------------- */
#include <405gp_i2c.h>
#include <miiphy.h>
#include <devices.h>
+#include "../common/common_util.h"
extern block_dev_desc_t * scsi_get_dev(int dev);
extern block_dev_desc_t * ide_get_dev(int dev);
out8(PLD_COM_MODE_REG,(in8(PLD_COM_MODE_REG)&0xfe));
}
-#define I2C_BACKUP_ADDR 0x7C00 /* 0x200 bytes for backup */
-
-void get_backup_values(backup_t *buf)
-{
- eeprom_read (CFG_DEF_EEPROM_ADDR,
- I2C_BACKUP_ADDR,
- (void *)buf,
- sizeof(backup_t));
-}
-
-void set_backup_values(int overwrite)
-{
- backup_t back;
- int i;
-
- get_backup_values(&back);
- if(!overwrite) {
- if(strncmp(back.signature,"MPL\0",4)==0) {
- printf("Not possible to write Backup\n");
- return;
- }
- }
- memcpy(back.signature,"MPL\0",4);
- i=getenv_r("serial#",back.serial_name,16);
- if(i==0) {
- printf("Not possible to write Backup\n");
- return;
- }
- back.serial_name[16]=0;
- i=getenv_r("ethaddr",back.eth_addr,20);
- if(i==0) {
- printf("Not possible to write Backup\n");
- return;
- }
- back.eth_addr[20]=0;
- eeprom_write (CFG_DEF_EEPROM_ADDR,
- CFG_ENV_OFFSET+I2C_BACKUP_ADDR,
- (void *)&back,
- sizeof(backup_t));
-}
-
-
-
/* ------------------------------------------------------------------------- */
return(1);
}
-/* ------------------------------------------------------------------------- */
-
- /* switches the cs0 and the cs1 to the locations.
- When boot is TRUE, the the mapping is switched
- to the boot configuration, If it is FALSE, the
- flash will be switched in the boot area */
-
-#undef SW_CS_DBG
-#ifdef SW_CS_DBG
-#define SW_CS_PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define SW_CS_PRINTF(fmt,args...)
-#endif
-
-
-int switch_cs(unsigned char boot)
-{
- unsigned long pbcr;
- mtdcr(ebccfga, pb0cr); /* get cs0 config reg */
- pbcr = mfdcr(ebccfgd);
- if((pbcr&0x00002000)==0) {
- /* we need only to switch if boot from MPS */
- /*printf(" MPS boot mode detected. ");*/
- /* printf("cs0 cfg: %lx\n",pbcr); */
- if(boot==TRUE) {
- /* switch to boot configuration */
- /* this is a 8bit boot, switch cs0 to flash location */
- SW_CS_PRINTF("switch to boot mode (MPS on High address\n");
- pbcr&=0x000FFFFF; /*mask base address of the cs0 */
- pbcr|=(FLASH_BASE0_PRELIM & 0xFFF00000);
- mtdcr(ebccfga, pb0cr);
- mtdcr(ebccfgd, pbcr);
- SW_CS_PRINTF(" new cs0 cfg: %lx\n",pbcr);
- mtdcr(ebccfga, pb1cr); /* get cs1 config reg (flash) */
- pbcr = mfdcr(ebccfgd);
- SW_CS_PRINTF(" old cs1 cfg: %lx\n",pbcr);
- pbcr&=0x000FFFFF; /*mask base address of the cs1 */
- pbcr|=(MULTI_PURPOSE_SOCKET_ADDR & 0xFFF00000);
- mtdcr(ebccfga, pb1cr);
- mtdcr(ebccfgd, pbcr);
- SW_CS_PRINTF(" new cs1 cfg: %lx, MPS is on High Address\n",pbcr);
- }
- else
- {
- /* map flash to boot area, */
- SW_CS_PRINTF("map Flash to boot area\n");
- pbcr&=0x000FFFFF; /*mask base address of the cs0 */
- pbcr|=(MULTI_PURPOSE_SOCKET_ADDR & 0xFFF00000);
- mtdcr(ebccfga, pb0cr);
- mtdcr(ebccfgd, pbcr);
- SW_CS_PRINTF(" new cs0 cfg: %lx\n",pbcr);
- mtdcr(ebccfga, pb1cr); /* get cs1 config reg (flash) */
- pbcr = mfdcr(ebccfgd);
- SW_CS_PRINTF(" cs1 cfg: %lx\n",pbcr);
- pbcr&=0x000FFFFF; /*mask base address of the cs1 */
- pbcr|=(FLASH_BASE0_PRELIM & 0xFFF00000);
- mtdcr(ebccfga, pb1cr);
- mtdcr(ebccfgd, pbcr);
- SW_CS_PRINTF(" new cs1 cfg: %lx Flash is on High Address\n",pbcr);
- }
- return TRUE;
- }
- else {
- SW_CS_PRINTF("Normal boot, no switching necessary\n");
- return FALSE;
- }
-}
-
void misc_init_r(bd_t *bd)
{
#if 0
printf("Population Options %d %d %d %d\n",(cfg)&0x1,(cfg>>1)&0x1,(cfg>>2)&0x1,(cfg>>3)&0x1);
printf("User LED %s\n",(com_mode & 0x4) ? "on" : "off");
printf("UART Clocks %d\n",(com_mode>>4)&0x3);
+ printf("Test ist %x\n",com_mode);
printf("User Config Switch %d %d %d %d %d %d %d %d\n",
(ext)&0x1,(ext>>1)&0x1,(ext>>2)&0x1,(ext>>3)&0x1,(ext>>4)&0x1,(ext>>5)&0x1,(ext>>6)&0x1,(ext>>7)&0x1);
printf("SER1 uses handshakes %s\n",(ext & 0x80) ? "DTR/DSR" : "RTS/CTS");
* Global routines used for MIP405
*****************************************************************************/
#ifndef __ASSEMBLY__
-int switch_cs(unsigned char boot);
+/*int switch_cs(unsigned char boot);*/
extern int mem_test(unsigned long start, unsigned long ramsize,int mode);
void user_led0(unsigned char on);
-typedef struct {
- char signature[4];
- char serial_name[17]; /* "MIP405_1000xxxxx" */
- char eth_addr[21]; /* "00:60:C2:0a:00:00" */
-} backup_t;
-void get_backup_values(backup_t *buf);
-void set_backup_values(int overwrite);
#endif
LIB = lib$(BOARD).a
-OBJS = $(BOARD).o ../common/flash.o cmd_pip405.o ../common/pci.o ../common/isa.o ../common/kbd.o ../common/video.o ../common/sym53c8xx.o ../common/usb_uhci.o ../common/memtst.o
+OBJS = $(BOARD).o \
+ ../common/flash.o cmd_pip405.o ../common/pci.o \
+ ../common/isa.o ../common/kbd.o ../common/video.o \
+ ../common/sym53c8xx.o ../common/usb_uhci.o \
+ ../common/memtst.o ../common/common_util.o
+
SOBJS = init.o
$(LIB): $(OBJS) $(SOBJS)
#include <ppcboot.h>
#include <command.h>
#include "pip405.h"
-#include <rtc.h>
-#include "../common/isa.h"
-#include "../common/video.h"
-#include <i2c.h>
+#include "../common/common_util.h"
-extern flash_info_t flash_info[]; /* info for FLASH chips */
-int PCI_Write_CFG_Reg(int BusDevFunc, int Reg, unsigned int Value, int Width);
-unsigned int PCI_Read_CFG_Reg(int BusDevFunc, int Reg, int Width);
+extern void print_pip405_info(void);
+extern int do_mplcommon(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]);
-
-
-#define TRUE 1
-#define FALSE 0
-
-#define IMAGE_SIZE 0x80000
-
-image_header_t header;
-
-
-
-int pip405_prg(unsigned long src,unsigned long size)
-{
- unsigned long start;
- flash_info_t *info;
- int i,rc;
- unsigned long *magic = (unsigned long *)src;
-
- info = &flash_info[0];
- start = 0 - size;
- for(i=info->sector_count-1;i>0;i--)
- {
- info->protect[i] = 0; /* unprotect this sector */
- if(start>=info->start[i])
- break;
- }
- /* set-up flash location */
- rc=switch_cs(FALSE);
- /* now erase flash */
- if(magic[0]!=IH_MAGIC) {
- printf("Bad Magic number\n");
- switch_cs(rc);
- return -1;
- }
- printf("Start erasing at %lx (sector %d) (start %lx)\n",
- start,i,info->start[i]);
- flash_erase (info, i, info->sector_count-1);
- printf("flash erased, programming 0x%lx Bytes\n",size);
- switch (rc = flash_write ((uchar *)src, start, size))
- {
- case 0: printf ("programming done\n"); return 0;
- case 1: printf ("Timeout writing to Flash\n"); return 1;
- case 2: printf ("Flash not Erased\n"); return 1;
- case 4: printf ("Can't write to protected Flash sectors\n"); return 1;
- case 8: printf ("Outside available Flash\n"); return 1;
- default: printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc); return 1;
- }
- return 1;
-}
-
-int pip405_prg_image(unsigned long load_addr)
-{
- unsigned long data,len,checksum;
- image_header_t *hdr=&header;
- /* Copy header so we can blank CRC field for re-calculation */
- memcpy (&header, (char *)load_addr, sizeof(image_header_t));
-
- if (hdr->ih_magic != IH_MAGIC) {
- printf ("Bad Magic Number\n");
- return 1;
- }
- if (hdr->ih_os != IH_OS_PPCBOOT) {
- printf ("No PPCBOOT Image\n");
- return 1;
- }
- if (hdr->ih_type != IH_TYPE_FIRMWARE) {
- printf ("No Firmware Image\n");
- return 1;
- }
- data = (ulong)&header;
- len = sizeof(image_header_t);
- checksum = hdr->ih_hcrc;
- hdr->ih_hcrc = 0;
- if (crc32 (0, (char *)data, len) != checksum) {
- printf ("Bad Header Checksum\n");
- return 1;
- }
- data = load_addr + sizeof(image_header_t);
- len = hdr->ih_size;
- printf (" Verifying Checksum ... ");
- if (crc32 (0, (char *)data, len) != hdr->ih_dcrc) {
- printf ("Bad Data CRC\n");
- return 1;
- }
- printf ("OK\n");
- return(pip405_prg(data,len));
-}
-
-
/* ------------------------------------------------------------------------- */
int do_pip405(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
{
- ulong size,src,device,function,load_addr;
- unsigned char i2c[3];
- int result;
- backup_t back;
- src = MULTI_PURPOSE_SOCKET_ADDR;
- size = IMAGE_SIZE;
+ ulong led_on,led_nr;
+
+ if (strcmp(argv[1], "info") == 0)
+ {
+ print_pip405_info();
+ return 0;
+ }
+ if (strcmp(argv[1], "led") == 0)
+ {
+ led_nr = (ulong)simple_strtoul(argv[2], NULL, 10);
+ led_on = (ulong)simple_strtoul(argv[3], NULL, 10);
+ if(!led_nr)
+ user_led0(led_on);
+ else
+ user_led1(led_on);
+ return 0;
+ }
+#if 0
if (strcmp(argv[1], "flash") == 0)
{
if (strcmp(argv[2], "floppy") == 0) {
load_addr=CFG_LOAD_ADDR;
result=do_fdcboot(cmdtp, bd, 0, 1, local_args);
}
- result=pip405_prg_image(load_addr);
+ result=mpl_prg_image(load_addr);
return result;
}
if (strcmp(argv[2], "mem") == 0) {
load_addr=CFG_LOAD_ADDR;
}
printf ("\nupdating bootloader image from memory at %lX\n",load_addr);
- result=pip405_prg_image(load_addr);
+ result=mpl_prg_image(load_addr);
return result;
}
if (strcmp(argv[2], "mps") == 0) {
printf ("\nupdating bootloader image from MSP\n");
- result=pip405_prg(src,size);
+ result=mpl_prg(src,size);
return result;
}
}
set_backup_values(1);
return 0;
}
+ if (strcmp(argv[1], "clearenvvalues") == 0)
+ {
+ if (strcmp(argv[2], "yes") == 0)
+ {
+ clear_env_values();
+ return 0;
+ }
+ }
if (strcmp(argv[1], "mem") == 0)
{
result=0;
}while(result);
return 0;
}
- if (strcmp(argv[1], "info") == 0)
- {
- print_pip405_info();
- return 0;
- }
- if (strcmp(argv[1], "i2c") == 0)
- {
- i2c[0]=CFG_I2C_EEPROM_ADDR;
- i2c[1]=0;
- i2c[2]=0;
- i2c_read(&i2c[0],3,(unsigned char *)CFG_LOAD_ADDR,512);
- return 0;
- }
- if (strcmp(argv[1], "led") == 0)
- {
- device = (ulong)simple_strtoul(argv[2], NULL, 10);
- function = (ulong)simple_strtoul(argv[3], NULL, 10);
- if(device==0)
- user_led0((function==1));
- else
- user_led1((function==1));
- return 0;
- }
- printf("Usage:\n%s\n", cmdtp->usage);
- return 1;
+ #endif
+ return (do_mplcommon(cmdtp, bd, flag, argc, argv));
}
/* ------------------------------------------------------------------------- */
#include <devices.h>
#include "../common/isa.h"
#include "../common/video.h"
+#include "../common/common_util.h"
extern block_dev_desc_t * scsi_get_dev(int dev);
/* ------------------------------------------------------------------------- */
-#define I2C_BACKUP_ADDR 0x7C00 /* 0x200 bytes for backup */
-
-void get_backup_values(backup_t *buf)
-{
- eeprom_read (CFG_DEF_EEPROM_ADDR,
- I2C_BACKUP_ADDR,
- (void *)buf,
- sizeof(backup_t));
-}
-
-void set_backup_values(int overwrite)
-{
- backup_t back;
- int i;
-
- get_backup_values(&back);
- if(!overwrite) {
- if(strncmp(back.signature,"MPL\0",4)==0) {
- printf("Not possible to write Backup\n");
- return;
- }
- }
- memcpy(back.signature,"MPL\0",4);
- i=getenv_r("serial#",back.serial_name,16);
- if(i==0) {
- printf("Not possible to write Backup\n");
- return;
- }
- back.serial_name[16]=0;
- i=getenv_r("ethaddr",back.eth_addr,20);
- if(i==0) {
- printf("Not possible to write Backup\n");
- return;
- }
- back.eth_addr[20]=0;
- eeprom_write (CFG_DEF_EEPROM_ADDR,
- CFG_ENV_OFFSET+I2C_BACKUP_ADDR,
- (void *)&back,
- sizeof(backup_t));
-}
-
/*
* Check Board Identity:
return(1);
}
-/* ------------------------------------------------------------------------- */
-
- /* switches the cs0 and the cs1 to the locations.
- When boot is TRUE, the the mapping is switched
- to the boot configuration, If it is FALSE, the
- flash will be switched in the boot area */
-
-
-#undef SW_CS_DBG
-#ifdef SW_CS_DBG
-#define SW_CS_PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define SW_CS_PRINTF(fmt,args...)
-#endif
-
-
-int switch_cs(unsigned char boot)
-{
- unsigned long pbcr;
- mtdcr(ebccfga, pb0cr); /* get cs0 config reg */
- pbcr = mfdcr(ebccfgd);
- if((pbcr&0x00002000)==0) {
- /* we need only to switch if boot from MPS */
- SW_CS_PRINTF(" MPS boot mode detected. ");
- /* printf("cs0 cfg: %lx\n",pbcr); */
- if(boot==TRUE) {
- /* switch to boot configuration */
- /* this is a 8bit boot, switch cs0 to flash location */
- SW_CS_PRINTF("switch to boot mode (MPS on High address\n");
- pbcr&=0x000FFFFF; /*mask base address of the cs0 */
- pbcr|=(FLASH_BASE0_PRELIM & 0xFFF00000);
- mtdcr(ebccfga, pb0cr);
- mtdcr(ebccfgd, pbcr);
- SW_CS_PRINTF(" new cs0 cfg: %lx\n",pbcr);
- mtdcr(ebccfga, pb1cr); /* get cs1 config reg (flash) */
- pbcr = mfdcr(ebccfgd);
- SW_CS_PRINTF(" old cs1 cfg: %lx\n",pbcr);
- pbcr&=0x000FFFFF; /*mask base address of the cs1 */
- pbcr|=(MULTI_PURPOSE_SOCKET_ADDR & 0xFFF00000);
- mtdcr(ebccfga, pb1cr);
- mtdcr(ebccfgd, pbcr);
- SW_CS_PRINTF(" new cs1 cfg: %lx, MPS is on High Address\n",pbcr);
- }
- else
- {
- /* map flash to boot area, */
- SW_CS_PRINTF("map Flash to boot area\n");
- pbcr&=0x000FFFFF; /*mask base address of the cs0 */
- pbcr|=(MULTI_PURPOSE_SOCKET_ADDR & 0xFFF00000);
- mtdcr(ebccfga, pb0cr);
- mtdcr(ebccfgd, pbcr);
- SW_CS_PRINTF(" new cs0 cfg: %lx\n",pbcr);
- mtdcr(ebccfga, pb1cr); /* get cs1 config reg (flash) */
- pbcr = mfdcr(ebccfgd);
- SW_CS_PRINTF(" cs1 cfg: %lx\n",pbcr);
- pbcr&=0x000FFFFF; /*mask base address of the cs1 */
- pbcr|=(FLASH_BASE0_PRELIM & 0xFFF00000);
- mtdcr(ebccfga, pb1cr);
- mtdcr(ebccfgd, pbcr);
- SW_CS_PRINTF(" new cs1 cfg: %lx Flash is on High Address\n",pbcr);
- }
- return TRUE;
- }
- else {
- SW_CS_PRINTF("Normal boot, no switching necessary\n");
- return FALSE;
- }
-}
void misc_init_r(bd_t *bd)
{
* Global routines used for PIP405
*****************************************************************************/
-int switch_cs(unsigned char boot);
extern int mem_test(unsigned long start, unsigned long ramsize,int mode);
void user_led0(unsigned char on);
void user_led1(unsigned char on);
-typedef struct {
- char signature[4];
- char serial_name[17]; /* "PIP405_1000xxxxx" */
- char eth_addr[21]; /* "00:60:C2:08:00:00" */
-} backup_t;
-
-void get_backup_values(backup_t *buf);
-void set_backup_values(int overwrite);
#define PLD_BASE_ADDRESS CFG_ISA_IO_BASE_ADDRESS + 0x800
#define PLD_PART_REG PLD_BASE_ADDRESS + 0
/*
- * (C) Copyright 2000, 2001
+ * (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
/*
- * (C) Copyright 2000, 2001
+ * (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
LIB = lib$(BOARD).a
-OBJS = $(BOARD).o flash.o ns16550.o serial.o speed.o dc2114x.o
+OBJS = $(BOARD).o flash.o ns16550.o serial.o dc2114x.o
SOBJS = early_init.o
$(LIB): .depend $(OBJS) $(SOBJS)
#error no valid console defined
#endif
+extern ulong get_bus_freq(ulong);
+
void
serial_init (unsigned long dummy, int baudrate)
{
- int clock_divisor = CFG_SERIAL_CLOCK / 16 / baudrate;
+ int clock_divisor = get_bus_freq(0) / 16 / baudrate;
NS16550_init(CONFIG_CONS_INDEX - 1, clock_divisor);
}
void
serial_setbrg (unsigned long dummy, int baudrate)
{
- int clock_divisor = CFG_SERIAL_CLOCK / 16 / baudrate;
+ int clock_divisor = get_bus_freq(0) / 16 / baudrate;
NS16550_reinit(console, clock_divisor);
}
+++ /dev/null
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppcboot.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-
-
-ulong get_bus_freq(ulong ignore)
-{
- return 100000000;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Measure CPU clock speed
- */
-
-/* Table to convert pllratio to actual processor clock scaling factor (*10)
- */
-#ifdef CONFIG_MPC8245 /* FIXME */
-short pllratio_to_factor[] = {
- 00, 00, 00, 10, 20, 20, 25, 00, 00, 00, 00, 00, 00, 00, 00, 00,
- 00, 00, 00, 10, 00, 00, 00, 45, 30, 00, 40, 00, 00, 00, 35, 00,
-};
-#endif
-
-ulong get_gclk_freq(void)
-{
- uint hid1 = mfspr(HID1);
-
- /* 5 bits for PLL ration on 8240/8245 */
- hid1 = (hid1 >> (32-5)) & 0x1f;
-
- return (pllratio_to_factor[hid1] * get_bus_freq(0)) / 10;
-}
-
-/* ------------------------------------------------------------------------- */
-
LIB = lib$(BOARD).a
-OBJS = $(BOARD).o flash.o ns16550.o ns87308.o serial.o speed.o \
+OBJS = $(BOARD).o flash.o ns16550.o ns87308.o serial.o \
pci.o eepro100.o
$(LIB): .depend $(OBJS)
return (0);
}
-static long dram_size (void)
+long int initdram (int board_type)
{
- static const unsigned long
- addressmask = 0x4ff00000, addressinc = 0x00100000;
- long result = 0;
+ int i, cnt;
+ volatile uchar * base= CFG_SDRAM_BASE;
+ volatile ulong * addr;
+ ulong save[32];
+ ulong val, ret = 0;
-#if (CFG_BANK_ENABLE & 0x80)
- result += (CFG_BANK7_END & addressmask) + addressinc -
- (CFG_BANK7_START & addressmask);
-#endif
-#if (CFG_BANK_ENABLE & 0x40)
- result += (CFG_BANK6_END & addressmask) + addressinc -
- (CFG_BANK6_START & addressmask);
-#endif
-#if (CFG_BANK_ENABLE & 0x20)
- result += (CFG_BANK5_END & addressmask) + addressinc -
- (CFG_BANK5_START & addressmask);
-#endif
-#if (CFG_BANK_ENABLE & 0x10)
- result += (CFG_BANK4_END & addressmask) + addressinc -
- (CFG_BANK4_START & addressmask);
-#endif
-#if (CFG_BANK_ENABLE & 0x08)
- result += (CFG_BANK3_END & addressmask) + addressinc -
- (CFG_BANK3_START & addressmask);
-#endif
-#if (CFG_BANK_ENABLE & 0x04)
- result += (CFG_BANK2_END & addressmask) + addressinc -
- (CFG_BANK2_START & addressmask);
-#endif
-#if (CFG_BANK_ENABLE & 0x02)
- result += (CFG_BANK1_END & addressmask) + addressinc -
- (CFG_BANK1_START & addressmask);
-#endif
-#if (CFG_BANK_ENABLE & 0x01)
- result += (CFG_BANK0_END & addressmask) + addressinc -
- (CFG_BANK0_START & addressmask);
-#endif
+ for (i=0, cnt=(CFG_MAX_RAM_SIZE / sizeof(long)) >> 1; cnt > 0; cnt >>= 1) {
+ addr = (volatile ulong *)base + cnt;
+ save[i++] = *addr;
+ *addr = ~cnt;
+ }
- return result;
-}
+ addr = (volatile ulong *)base;
+ save[i] = *addr;
+ *addr = 0;
-long int initdram (int board_type)
-{
- return dram_size ();
+ if (*addr != 0) {
+ *addr = save[i];
+ goto Done;
+ }
+
+ for (cnt = 1; cnt <= CFG_MAX_RAM_SIZE / sizeof(long); cnt <<= 1) {
+ addr = (volatile ulong *)base + cnt;
+ val = *addr;
+ *addr = save[--i];
+ if (val != ~cnt) {
+ ulong new_bank0_end = cnt * sizeof(long) - 1;
+ ulong mear1 = mpc824x_mpc107_getreg(MEAR1);
+ ulong emear1 = mpc824x_mpc107_getreg(EMEAR1);
+ mear1 = (mear1 & 0xFFFFFF00) |
+ ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
+ emear1 = (emear1 & 0xFFFFFF00) |
+ ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
+ mpc824x_mpc107_setreg(MEAR1, mear1);
+ mpc824x_mpc107_setreg(EMEAR1, emear1);
+
+ ret = cnt * sizeof(long);
+ goto Done;
+ }
+ }
+
+ ret = CFG_MAX_RAM_SIZE;
+Done:
+ return ret;
}
/*
+++ /dev/null
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <ppcboot.h>
-#include <mpc824x.h>
-#include <asm/processor.h>
-#include "speed.h"
-
-/*use UART2 to measure bus speed*/
-#include "ns16550.h"
-
-
-/* Access functions for the Machine State Register */
-static __inline__ unsigned long get_msr(void)
-{
- unsigned long msr;
-
- __asm__ ("mfmsr %0" : "=r" (msr) :);
- return msr;
-}
-
-static __inline__ void set_msr(unsigned long msr)
-{
- __asm__ __volatile__("mtmsr %0" : : "r" (msr));
-}
-
-/* ------------------------------------------------------------------------- */
-
-ulong get_bus_freq (ulong ignore)
-{
- return 66666666;
-}
-
-/* ------------------------------------------------------------------------- */
-
-/*
- * Measure CPU clock speed
- */
-
-/*
- * table to convert pllratio to actual processor clock scaling factor (*2)
- * if you are using a a different processor with your sandpoint,
- * have a look at pmc.c in the dink source for values, or
- * figure it out from the hardware book
- */
-
-#ifdef CONFIG_MPC824X
-const unsigned char pllratio_to_factor[32] = {
- 0, 0, 0, 2, 4, 4, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 2, 0, 0, 0, 9, 6, 0, 8, 0, 0, 0, 7, 0
-};
-#else
- #error Enter clock divider array here!
-#endif
-
-ulong get_gclk_freq (void)
-{
- uint hid1;
- hid1 = mfspr(HID1);
- #ifdef CONFIG_MPC824X
- hid1 = (hid1 >> (32-5)) & 0x1f; /* 5 bits for PLL ration on 824x */
- #else
- hid1 = (hid1 >> (32-4)) & 0xf; /* 4 bits on everythings else*/
- #endif
-
- return pllratio_to_factor[hid1] * get_bus_freq(0)/2;
-}
-
-/* ------------------------------------------------------------------------- */
-
static boot_os_Fcn do_bootm_netbsd;
#if (CONFIG_COMMANDS & CFG_CMD_ELF)
static boot_os_Fcn do_bootm_vxworks;
+static boot_os_Fcn do_bootm_qnxelf;
int do_bootvx( cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[] );
+int do_bootelf( cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[] );
#endif /* CFG_CMD_ELF */
image_header_t header;
do_bootm_vxworks (cmdtp, bd, flag, argc, argv,
addr, len_ptr, verify);
break;
+ case IH_OS_QNX:
+ do_bootm_qnxelf (cmdtp, bd, flag, argc, argv,
+ addr, len_ptr, verify);
+ break;
#endif /* CFG_CMD_ELF */
}
case IH_OS_NETBSD: os = "NetBSD"; break;
case IH_OS_LINUX: os = "Linux"; break;
case IH_OS_VXWORKS: os = "VxWorks"; break;
+ case IH_OS_QNX: os = "QNX"; break;
case IH_OS_PPCBOOT: os = "PPCBoot"; break;
default: os = "Unknown OS"; break;
}
setenv("loadaddr", str);
do_bootvx(cmdtp, bd, 0, 0, NULL);
}
+
+static void
+do_bootm_qnxelf (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[],
+ ulong addr, ulong *len_ptr, int verify)
+{
+ image_header_t *hdr = &header;
+ char *local_args[2];
+ char str[16];
+
+ sprintf(str, "%x", hdr->ih_ep); /* write entry-point into string */
+ local_args[0] = argv[0];
+ local_args[1] = str; /* and provide it via the arguments */
+ do_bootelf(cmdtp, bd, 0, 2, local_args);
+}
#endif /* CFG_CMD_ELF */
cnt /= info.blksz;
cnt -= 1;
} else {
- cnt = info.size - 1;
+ printf("\n** Bad Magic Number **\n");
+ return 1;
}
if (scsi_read (dev, info.start+1, cnt,
for(i=0;i<USB_MAX_STOR_DEV;i++) {
memset(&usb_dev_desc[i],0,sizeof(block_dev_desc_t));
usb_dev_desc[i].target=0xff;
- usb_dev_desc[i].if_type=IF_TYPE_SCSI;
+ usb_dev_desc[i].if_type=IF_TYPE_USB;
usb_dev_desc[i].dev=i;
usb_dev_desc[i].part_type=PART_TYPE_UNKNOWN;
usb_dev_desc[i].block_read=usb_stor_read;
LIB = lib$(CPU).a
START = start.S
-OBJS = traps.o cpu.o cpu_init.o interrupts.o \
+OBJS = traps.o cpu.o cpu_init.o interrupts.o speed.o \
drivers/epic/epic1.o
all: .depend $(START) $(LIB)
CONFIG_WRITE_HALFWORD(PCICR, 0x06); /* Bus Master, respond to PCI memory space acesses*/
/* CONFIG_WRITE_HALFWORD(PCISR, 0xffff); */ /*reset PCISR*/
-#if defined(CONFIG_MPC8245)
- CONFIG_WRITE_BYTE(PCLSR, 0x8); /* set cache line size */
- /* clear then set then clear the memory DLL */
+ CONFIG_WRITE_BYTE(PCLSR, 0x8); /* set PCI cache line size */
+
+ /*
+ * Note that although this bit is cleared after a hard reset, it
+ * must be explicitly set and then cleared by software during
+ * initialization in order to guarantee correct operation of the
+ * DLL and the SDRAM_CLK[0:3] signals (if they are used).
+ */
CONFIG_READ_BYTE (AMBOR, val);
CONFIG_WRITE_BYTE(AMBOR, val & 0xDF);
CONFIG_WRITE_BYTE(AMBOR, val | 0x20);
CONFIG_WRITE_BYTE(AMBOR, val & 0xDF);
-#endif
CONFIG_READ_WORD(PICR1, val);
#if defined(CONFIG_MPC8240)
--- /dev/null
+/*
+ * (C) Copyright 2001
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2002
+ * Gregory E. Allen, gallen@arlut.utexas.edu
+ * Applied Research Laboratories, The University of Texas at Austin
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <ppcboot.h>
+#include <mpc824x.h>
+#include <asm/processor.h>
+
+/* ------------------------------------------------------------------------- */
+/* NOTE: This describes the proper use of this file. */
+/* CONFIG_SYS_CLK_FREQ should be defined as the input frequency on PCI_SYNC_IN */
+/* CONFIG_PLL_PCI_TO_MEM_MULTIPLIER is only required on MPC8240 boards */
+/* it should be defined as the PCI to Memory Multiplier as documented */
+/* in the MPC8240 Hardware Specs */
+/* Other mpc824x boards don't need CONFIG_PLL_PCI_TO_MEM_MULTIPLIER because */
+/* they can determine it from the PCR */
+
+/* If the PCR is an undocumented feature on the mpc8240 then we can do away */
+/* with CONFIG_PLL_PCI_TO_MEM_MULTIPLIER altogether */
+
+/* ------------------------------------------------------------------------- */
+
+/* This gives the PCI to Memory multiplier times 10 */
+/* The index is the value of PLL_CFG[0:4] */
+/* This is documented in the MPC8240/5 Hardware Specs */
+
+short pll_pci_to_mem_multiplier[] = {
+#if defined(CONFIG_MPC8240)
+ 30, 30, 10, 10, 20, 10, 00, 10,
+ 10, 00, 20, 00, 20, 00, 20, 00,
+ 30, 00, 15, 00, 20, 00, 20, 00,
+ 25, 00, 10, 00, 15, 15, 00, 00
+#elif defined(CONFIG_MPC8245)
+ 30, 30, 10, 10, 20, 10, 10, 10,
+ 10, 20, 20, 15, 20, 15, 20, 00,
+ 30, 00, 15, 00, 20, 25, 20, 40,
+ 25, 20, 10, 20, 15, 15, 15, 00
+#else
+#error Specific type of MPC824x must be defined (i.e. CONFIG_MPC8240)
+#endif
+};
+
+#define CU824_PLL_STATE_REG 0xFE80002F
+#define PCR 0x800000E2
+
+/* ------------------------------------------------------------------------- */
+
+/* compute the memory bus clock frequency */
+ulong get_bus_freq(ulong ignore)
+{
+ unsigned char pll_cfg;
+#if defined(CONFIG_MPC8240) && !defined(CONFIG_CU824)
+ return (CONFIG_SYS_CLK_FREQ) * (CONFIG_PLL_PCI_TO_MEM_MULTIPLIER);
+#elif defined(CONFIG_CU824)
+ pll_cfg = *(volatile unsigned char *) (CU824_PLL_STATE_REG);
+ pll_cfg &= 0x1f;
+#else
+ CONFIG_READ_BYTE(PCR, pll_cfg);
+ pll_cfg = (pll_cfg >> 3) & 0x1f;
+#endif
+ return ((CONFIG_SYS_CLK_FREQ) * pll_pci_to_mem_multiplier[pll_cfg] + 5) / 10;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+/* This gives the Memory to CPU Core multiplier times 10 */
+/* The index is the value of PLLRATIO in HID1 */
+/* This is documented in the MPC8240 Hardware Specs */
+/* This is not documented for MPC8245 ? FIXME */
+short pllratio_to_factor[] = {
+ 00, 00, 00, 10, 20, 20, 25, 45,
+ 00, 00, 00, 00, 00, 00, 00, 00,
+ 00, 00, 00, 10, 00, 00, 00, 45,
+ 30, 00, 40, 00, 00, 00, 35, 00,
+};
+
+/* compute the memory bus clock frequency */
+ulong get_gclk_freq(void)
+{
+ uint hid1 = mfspr(HID1);
+ hid1 = (hid1 >> (32-5)) & 0x1f;
+ return (pllratio_to_factor[hid1] * get_bus_freq(0) + 5) / 10;
+}
break;
case IF_TYPE_ATAPI: puts ("ATAPI");
break;
+ case IF_TYPE_USB: puts ("USB");
+ break;
+ case IF_TYPE_DOC: puts ("DOC");
+ break;
default: puts ("UNKNOWN");
break;
}
info->size = le32_to_int (pt->size4);
switch(dev_desc->if_type) {
case IF_TYPE_IDE:
+ case IF_TYPE_ATAPI:
sprintf (info->name, "hd%c%d\n", 'a' + dev_desc->dev, part_num);
break;
case IF_TYPE_SCSI:
sprintf (info->name, "sd%c%d\n", 'a' + dev_desc->dev, part_num);
break;
+ case IF_TYPE_USB:
+ sprintf (info->name, "usbd%c%d\n", 'a' + dev_desc->dev, part_num);
+ break;
+ case IF_TYPE_DOC:
+ sprintf (info->name, "docd%c%d\n", 'a' + dev_desc->dev, part_num);
+ break;
default:
sprintf (info->name, "xx%c%d\n", 'a' + dev_desc->dev, part_num);
break;
"usb tree - show USB device tree\n" \
"usb info [dev] - show available USB devices\n" \
"usb scan - (re-)scan USB bus for storage devices\n" \
- "usb device [dev] - show or set current USB staorage device\n" \
+ "usb device [dev] - show or set current USB storage device\n" \
"usb part [dev] - print partition table of one or all USB storage devices\n" \
"usb read addr blk# cnt - read `cnt' blocks starting at block `blk#'\n"\
" to memory address `addr'\n" \
#define CMD_TBL_USBBOOT
#endif
-#endif /* _CMD_SCSI_H */
+#endif /* _CMD_USB_H */
* Environment definitions
**************************************************************/
#define CONFIG_BAUDRATE 9600 /* STD Baudrate */
-#define CONFIG_BOOTDELAY -1 /* no autoboot */
+#define CONFIG_BOOTDELAY 5
+/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
#define CONFIG_BOOTCOMMAND "diskboot 200000 0:1; bootm" /* autoboot command */
#define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
-#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
-#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CFG_MEMTEST_START 0x0100000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */
#undef CFG_EXT_SERIAL_CLOCK /* no external serial clock used */
+#define CFG_IGNORE_405_UART_ERRATA_59
/* The following table includes the supported baudrates */
#define CFG_BAUDRATE_TABLE \
/************************************************************
* Ident
************************************************************/
-#define VERSION_TAG "REL_1_1_1"
+#define VERSION_TAG "REL_1_1_3"
#define CONFIG_IDENT_STRING "\n(c) 2001 by MPL AG Switzerland, MEV-10072-001 " VERSION_TAG
* For the detail description refer to the MPC8240 user's manual.
*/
-#define CONFIG_SYS_CLK_FREQ 200000000
+#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
+#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER 2
#define CFG_HZ 1000
#define CFG_ETH_DEV_FN 0x00
* For the detail description refer to the MPC8240 user's manual.
*/
-#define CONFIG_SYS_CLK_FREQ 100000000
-#define CFG_SERIAL_CLOCK CONFIG_SYS_CLK_FREQ
+#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
#define CFG_HZ 1000
#define CFG_ETH_DEV_FN 0x7800
* Environment definitions
**************************************************************/
#define CONFIG_BAUDRATE 9600 /* STD Baudrate */
-#define CONFIG_BOOTDELAY -1 /* no autoboot */
+
+
+#define CONFIG_BOOTDELAY 5
+/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
#define CONFIG_BOOTCOMMAND "diskboot 200000 0:1; bootm" /* autoboot command */
#define CONFIG_BOOTARGS "console=ttyS0,9600 root=/dev/hda5" /* boot arguments */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
-#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
-#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+#define CFG_MEMTEST_START 0x0100000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 1 ... 12 MB in DRAM */
#undef CFG_EXT_SERIAL_CLOCK /* no external serial clock used */
+#define CFG_IGNORE_405_UART_ERRATA_59
/* The following table includes the supported baudrates */
#define CFG_BAUDRATE_TABLE \
/************************************************************
* Ident
************************************************************/
-#define VERSION_TAG "REL_1_1_1"
+#define VERSION_TAG "REL_1_1_3"
#define CONFIG_IDENT_STRING "\n(c) 2001 by MPL AG Switzerland, MEV-10066-001 " VERSION_TAG
* Please note that CFG_SDRAM_BASE _must_ start at 0
*/
#define CFG_SDRAM_BASE 0x00000000
+#define CFG_MAX_RAM_SIZE 0x10000000
#if defined (USE_DINK32)
#define CFG_MONITOR_LEN 0x00030000
* You should know what you are doing if you make changes here.
*/
+#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
+#define CONFIG_PLL_PCI_TO_MEM_MULTIPLIER 2
#define CFG_ROMNAL 7 /*rom/flash next access time */
#define CFG_ROMFAL 11 /*rom/flash access time */
#define CFG_REGISTERD_TYPE_BUFFER 1
/* memory bank settings*/
-/* only bits 20-29 are actually used from these vales to set the start/end address
- the upper two bits will be 0, and the lower 20 bits will be set to
- 0x00000 for a start address, or 0xfffff for an end address*/
-
+/*
+ * only bits 20-29 are actually used from these vales to set the
+ * start/end address the upper two bits will be 0, and the lower 20
+ * bits will be set to 0x00000 for a start address, or 0xfffff for an
+ * end address
+ */
#define CFG_BANK0_START 0x00000000
-#define CFG_BANK0_END 0x01ffffff
+#define CFG_BANK0_END (CFG_MAX_RAM_SIZE - 1)
#define CFG_BANK0_ENABLE 1
-#define CFG_BANK1_START 0x04000000
-#define CFG_BANK1_END 0x07ffffff
+#define CFG_BANK1_START 0x3ff00000
+#define CFG_BANK1_END 0x3fffffff
#define CFG_BANK1_ENABLE 0
-#define CFG_BANK2_START 0x08000000
-#define CFG_BANK2_END 0x0bffffff
+#define CFG_BANK2_START 0x3ff00000
+#define CFG_BANK2_END 0x3fffffff
#define CFG_BANK2_ENABLE 0
-#define CFG_BANK3_START 0x0c000000
-#define CFG_BANK3_END 0x0fffffff
+#define CFG_BANK3_START 0x3ff00000
+#define CFG_BANK3_END 0x3fffffff
#define CFG_BANK3_ENABLE 0
#define CFG_BANK4_START 0x00000000
#define CFG_BANK4_END 0x00000000
#define IF_TYPE_IDE 1
#define IF_TYPE_SCSI 2
#define IF_TYPE_ATAPI 3
+#define IF_TYPE_USB 4
+#define IF_TYPE_DOC 5
/* Part types */
#define PART_TYPE_UNKNOWN 0x00
#define PART_TYPE_MAC 0x01
projects / users / rw / ppcboot.git / commitdiff