}
 EXPORT_SYMBOL_GPL(regmap_irq_set_type_config_simple);
 
+static int regmap_irq_create_domain(struct fwnode_handle *fwnode, int irq_base,
+                                   const struct regmap_irq_chip *chip,
+                                   struct regmap_irq_chip_data *d)
+{
+       struct irq_domain_info info = {
+               .fwnode = fwnode,
+               .size = chip->num_irqs,
+               .hwirq_max = chip->num_irqs,
+               .virq_base = irq_base,
+               .ops = ®map_domain_ops,
+               .host_data = d,
+               .name_suffix = chip->domain_suffix,
+       };
+
+       d->domain = irq_domain_instantiate(&info);
+       if (IS_ERR(d->domain)) {
+               dev_err(d->map->dev, "Failed to create IRQ domain\n");
+               return PTR_ERR(d->domain);
+       }
+
+       return 0;
+}
+
+
 /**
  * regmap_add_irq_chip_fwnode() - Use standard regmap IRQ controller handling
  *
                }
        }
 
-       if (irq_base)
-               d->domain = irq_domain_create_legacy(fwnode, chip->num_irqs,
-                                                    irq_base, 0,
-                                                    ®map_domain_ops, d);
-       else
-               d->domain = irq_domain_create_linear(fwnode, chip->num_irqs,
-                                                    ®map_domain_ops, d);
-       if (!d->domain) {
-               dev_err(map->dev, "Failed to create IRQ domain\n");
-               ret = -ENOMEM;
+       ret = regmap_irq_create_domain(fwnode, irq_base, chip, d);
+       if (ret)
                goto err_alloc;
-       }
 
        ret = request_threaded_irq(irq, NULL, regmap_irq_thread,
                                   irq_flags | IRQF_ONESHOT,
 
  * struct regmap_irq_chip - Description of a generic regmap irq_chip.
  *
  * @name:        Descriptive name for IRQ controller.
+ * @domain_suffix: Name suffix to be appended to end of IRQ domain name. Needed
+ *                when multiple regmap-IRQ controllers are created from same
+ *                device.
  *
  * @main_status: Base main status register address. For chips which have
  *              interrupts arranged in separate sub-irq blocks with own IRQ
  */
 struct regmap_irq_chip {
        const char *name;
+       const char *domain_suffix;
 
        unsigned int main_status;
        unsigned int num_main_status_bits;