]> www.infradead.org Git - users/hch/misc.git/commitdiff
iommu/vt-d: Avoid draining PRQ in sva mm release path
authorLu Baolu <baolu.lu@linux.intel.com>
Fri, 13 Dec 2024 01:17:52 +0000 (09:17 +0800)
committerJoerg Roedel <jroedel@suse.de>
Fri, 13 Dec 2024 14:54:27 +0000 (15:54 +0100)
When a PASID is used for SVA by a device, it's possible that the PASID
entry is cleared before the device flushes all ongoing DMA requests and
removes the SVA domain. This can occur when an exception happens and the
process terminates before the device driver stops DMA and calls the
iommu driver to unbind the PASID.

There's no need to drain the PRQ in the mm release path. Instead, the PRQ
will be drained in the SVA unbind path.

Unfortunately, commit c43e1ccdebf2 ("iommu/vt-d: Drain PRQs when domain
removed from RID") changed this behavior by unconditionally draining the
PRQ in intel_pasid_tear_down_entry(). This can lead to a potential
sleeping-in-atomic-context issue.

Smatch static checker warning:

drivers/iommu/intel/prq.c:95 intel_iommu_drain_pasid_prq()
warn: sleeping in atomic context

To avoid this issue, prevent draining the PRQ in the SVA mm release path
and restore the previous behavior.

Fixes: c43e1ccdebf2 ("iommu/vt-d: Drain PRQs when domain removed from RID")
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/linux-iommu/c5187676-2fa2-4e29-94e0-4a279dc88b49@stanley.mountain/
Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Link: https://lore.kernel.org/r/20241212021529.1104745-1-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
drivers/iommu/intel/pasid.c

index 0f2a926d3bd595d6617b8a572cec45465c8206b6..5b7d85f1e143c0a508526554f5513db5d9da7af0 100644 (file)
@@ -265,7 +265,8 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev,
                iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH);
 
        devtlb_invalidation_with_pasid(iommu, dev, pasid);
-       intel_iommu_drain_pasid_prq(dev, pasid);
+       if (!fault_ignore)
+               intel_iommu_drain_pasid_prq(dev, pasid);
 }
 
 /*