/* This can only be done after all function pointers are setup. */
        ret_val = e1000_get_phy_id_82571(hw);
+       if (ret_val) {
+               e_dbg("Error getting PHY ID\n");
+               return ret_val;
+       }
 
        /* Verify phy id */
        switch (hw->mac.type) {
        case e1000_82571:
        case e1000_82572:
                if (phy->id != IGP01E1000_I_PHY_ID)
-                       return -E1000_ERR_PHY;
+                       ret_val = -E1000_ERR_PHY;
                break;
        case e1000_82573:
                if (phy->id != M88E1111_I_PHY_ID)
-                       return -E1000_ERR_PHY;
+                       ret_val = -E1000_ERR_PHY;
                break;
        case e1000_82574:
        case e1000_82583:
                if (phy->id != BME1000_E_PHY_ID_R2)
-                       return -E1000_ERR_PHY;
+                       ret_val = -E1000_ERR_PHY;
                break;
        default:
-               return -E1000_ERR_PHY;
+               ret_val = -E1000_ERR_PHY;
                break;
        }
 
-       return 0;
+       if (ret_val)
+               e_dbg("PHY ID unknown: type = 0x%08x\n", phy->id);
+
+       return ret_val;
 }
 
 /**
  **/
 static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
 {
-       u32 ctrl, ctrl_ext, icr;
+       u32 ctrl, ctrl_ext;
        s32 ret_val;
 
        /*
 
        /* Clear any pending interrupt events. */
        ew32(IMC, 0xffffffff);
-       icr = er32(ICR);
+       er32(ICR);
 
        if (hw->mac.type == e1000_82571) {
                /* Install any alternate MAC address into RAR0 */
 
  **/
 static s32 e1000_reset_hw_80003es2lan(struct e1000_hw *hw)
 {
-       u32 ctrl, icr;
+       u32 ctrl;
        s32 ret_val;
 
        /*
 
        /* Clear any pending interrupt events. */
        ew32(IMC, 0xffffffff);
-       icr = er32(ICR);
+       er32(ICR);
 
        ret_val = e1000_check_alt_mac_addr_generic(hw);
 
 
 {
        struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
        u16 reg;
-       u32 ctrl, icr, kab;
+       u32 ctrl, kab;
        s32 ret_val;
 
        /*
                ew32(CRC_OFFSET, 0x65656565);
 
        ew32(IMC, 0xffffffff);
-       icr = er32(ICR);
+       er32(ICR);
 
        kab = er32(KABGTXD);
        kab |= E1000_KABGTXD_BGSQLBIAS;
 
                        ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
                else
                        ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
+
+               if (ret_val)
+                       e_dbg("failed to enable jumbo frame workaround mode\n");
        }
 
        /* Program MC offset vector base */