for_each_pipe(dev_priv, pipe) {
                seq_printf(m, "Pipe %c\n", pipe_name(pipe));
 
-               for_each_plane(pipe, plane) {
+               for_each_plane(dev_priv, pipe, plane) {
                        entry = &ddb->plane[pipe][plane];
                        seq_printf(m, "  Plane%-8d%8u%8u%8u\n", plane + 1,
                                   entry->start, entry->end,
 
 
 #define for_each_pipe(__dev_priv, __p) \
        for ((__p) = 0; (__p) < INTEL_INFO(__dev_priv)->num_pipes; (__p)++)
-#define for_each_plane(pipe, p) \
-       for ((p) = 0; (p) < INTEL_INFO(dev)->num_sprites[(pipe)] + 1; (p)++)
+#define for_each_plane(__dev_priv, __pipe, __p)                                \
+       for ((__p) = 0;                                                 \
+            (__p) < INTEL_INFO(__dev_priv)->num_sprites[(__pipe)] + 1; \
+            (__p)++)
 #define for_each_sprite(p, s) for ((s) = 0; (s) < INTEL_INFO(dev)->num_sprites[(p)]; (s)++)
 
 #define for_each_crtc(dev, crtc) \
 
 void skl_ddb_get_hw_state(struct drm_i915_private *dev_priv,
                          struct skl_ddb_allocation *ddb /* out */)
 {
-       struct drm_device *dev = dev_priv->dev;
        enum pipe pipe;
        int plane;
        u32 val;
 
        for_each_pipe(dev_priv, pipe) {
-               for_each_plane(pipe, plane) {
+               for_each_plane(dev_priv, pipe, plane) {
                        val = I915_READ(PLANE_BUF_CFG(pipe, plane));
                        skl_ddb_entry_init_from_hw(&ddb->plane[pipe][plane],
                                                   val);
                      struct skl_ddb_allocation *ddb /* out */)
 {
        struct drm_device *dev = crtc->dev;
+       struct drm_i915_private *dev_priv = dev->dev_private;
        struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
        enum pipe pipe = intel_crtc->pipe;
        struct skl_ddb_entry *alloc = &ddb->pipe[pipe];
        alloc->end -= cursor_blocks;
 
        /* 1. Allocate the mininum required blocks for each active plane */
-       for_each_plane(pipe, plane) {
+       for_each_plane(dev_priv, pipe, plane) {
                const struct intel_plane_wm_parameters *p;
 
                p = ¶ms->plane[plane];
 static void
 skl_wm_flush_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, int pass)
 {
-       struct drm_device *dev = dev_priv->dev;
        int plane;
 
        DRM_DEBUG_KMS("flush pipe %c (pass %d)\n", pipe_name(pipe), pass);
 
-       for_each_plane(pipe, plane) {
+       for_each_plane(dev_priv, pipe, plane) {
                I915_WRITE(PLANE_SURF(pipe, plane),
                           I915_READ(PLANE_SURF(pipe, plane)));
        }