]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
drm/i915/dp: Move link train fallback to intel_dp_link_training.c
authorImre Deak <imre.deak@intel.com>
Mon, 10 Jun 2024 16:49:15 +0000 (19:49 +0300)
committerImre Deak <imre.deak@intel.com>
Thu, 13 Jun 2024 18:26:29 +0000 (21:26 +0300)
Move the functions used to reduce the link parameters during link
training to intel_dp_link_training.c .

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <navaremanasi@chromium.org>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240610164933.2947366-4-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_dp.c
drivers/gpu/drm/i915/display/intel_dp.h
drivers/gpu/drm/i915/display/intel_dp_link_training.c

index 8541a304a72dbf9dcf73f8059bb22a9adb52eee0..7386c1050d4fc295c26ee0d1654fa8fad333b3ee 100644 (file)
@@ -330,7 +330,7 @@ static int intel_dp_common_len_rate_limit(const struct intel_dp *intel_dp,
                                       intel_dp->num_common_rates, max_rate);
 }
 
-static int intel_dp_common_rate(struct intel_dp *intel_dp, int index)
+int intel_dp_common_rate(struct intel_dp *intel_dp, int index)
 {
        if (drm_WARN_ON(&dp_to_i915(intel_dp)->drm,
                        index < 0 || index >= intel_dp->num_common_rates))
@@ -605,7 +605,7 @@ static int intersect_rates(const int *source_rates, int source_len,
 }
 
 /* return index of rate in rates array, or -1 if not found */
-static int intel_dp_rate_index(const int *rates, int len, int rate)
+int intel_dp_rate_index(const int *rates, int len, int rate)
 {
        int i;
 
@@ -655,78 +655,6 @@ static bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate,
        return true;
 }
 
-static bool intel_dp_can_link_train_fallback_for_edp(struct intel_dp *intel_dp,
-                                                    int link_rate,
-                                                    u8 lane_count)
-{
-       /* FIXME figure out what we actually want here */
-       const struct drm_display_mode *fixed_mode =
-               intel_panel_preferred_fixed_mode(intel_dp->attached_connector);
-       int mode_rate, max_rate;
-
-       mode_rate = intel_dp_link_required(fixed_mode->clock, 18);
-       max_rate = intel_dp_max_link_data_rate(intel_dp, link_rate, lane_count);
-       if (mode_rate > max_rate)
-               return false;
-
-       return true;
-}
-
-int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
-                                           int link_rate, u8 lane_count)
-{
-       struct drm_i915_private *i915 = dp_to_i915(intel_dp);
-       int index;
-
-       /*
-        * TODO: Enable fallback on MST links once MST link compute can handle
-        * the fallback params.
-        */
-       if (intel_dp->is_mst) {
-               drm_err(&i915->drm, "Link Training Unsuccessful\n");
-               return -1;
-       }
-
-       if (intel_dp_is_edp(intel_dp) && !intel_dp->use_max_params) {
-               drm_dbg_kms(&i915->drm,
-                           "Retrying Link training for eDP with max parameters\n");
-               intel_dp->use_max_params = true;
-               return 0;
-       }
-
-       index = intel_dp_rate_index(intel_dp->common_rates,
-                                   intel_dp->num_common_rates,
-                                   link_rate);
-       if (index > 0) {
-               if (intel_dp_is_edp(intel_dp) &&
-                   !intel_dp_can_link_train_fallback_for_edp(intel_dp,
-                                                             intel_dp_common_rate(intel_dp, index - 1),
-                                                             lane_count)) {
-                       drm_dbg_kms(&i915->drm,
-                                   "Retrying Link training for eDP with same parameters\n");
-                       return 0;
-               }
-               intel_dp->link.max_rate = intel_dp_common_rate(intel_dp, index - 1);
-               intel_dp->link.max_lane_count = lane_count;
-       } else if (lane_count > 1) {
-               if (intel_dp_is_edp(intel_dp) &&
-                   !intel_dp_can_link_train_fallback_for_edp(intel_dp,
-                                                             intel_dp_max_common_rate(intel_dp),
-                                                             lane_count >> 1)) {
-                       drm_dbg_kms(&i915->drm,
-                                   "Retrying Link training for eDP with same parameters\n");
-                       return 0;
-               }
-               intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
-               intel_dp->link.max_lane_count = lane_count >> 1;
-       } else {
-               drm_err(&i915->drm, "Link Training Unsuccessful\n");
-               return -1;
-       }
-
-       return 0;
-}
-
 u32 intel_dp_mode_to_fec_clock(u32 mode_clock)
 {
        return div_u64(mul_u32_u32(mode_clock, DP_DSC_FEC_OVERHEAD_FACTOR),
index f14506a63aa06618d8ea6e3311298058014205b4..0d169027067fc61689dae74f5b7a423af14fcf6c 100644 (file)
@@ -55,8 +55,6 @@ void intel_dp_connector_sync_state(struct intel_connector *connector,
                                   const struct intel_crtc_state *crtc_state);
 void intel_dp_set_link_params(struct intel_dp *intel_dp,
                              int link_rate, int lane_count);
-int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
-                                           int link_rate, u8 lane_count);
 int intel_dp_get_active_pipes(struct intel_dp *intel_dp,
                              struct drm_modeset_acquire_ctx *ctx,
                              u8 *pipe_mask);
@@ -107,6 +105,8 @@ int intel_dp_config_required_rate(const struct intel_crtc_state *crtc_state);
 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
 int intel_dp_max_common_rate(struct intel_dp *intel_dp);
 int intel_dp_max_common_lane_count(struct intel_dp *intel_dp);
+int intel_dp_common_rate(struct intel_dp *intel_dp, int index);
+int intel_dp_rate_index(const int *rates, int len, int rate);
 void intel_dp_update_sink_caps(struct intel_dp *intel_dp);
 
 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
index 947575140059da417798b96bf82f5d3fe3e02fa6..4db293f256896080f6c971089834411d4a9331ec 100644 (file)
@@ -25,6 +25,7 @@
 #include "intel_display_types.h"
 #include "intel_dp.h"
 #include "intel_dp_link_training.h"
+#include "intel_panel.h"
 
 #define LT_MSG_PREFIX                  "[CONNECTOR:%d:%s][ENCODER:%d:%s][%s] "
 #define LT_MSG_ARGS(_intel_dp, _dp_phy)        (_intel_dp)->attached_connector->base.base.id, \
@@ -1091,6 +1092,78 @@ out:
        return ret;
 }
 
+static bool intel_dp_can_link_train_fallback_for_edp(struct intel_dp *intel_dp,
+                                                    int link_rate,
+                                                    u8 lane_count)
+{
+       /* FIXME figure out what we actually want here */
+       const struct drm_display_mode *fixed_mode =
+               intel_panel_preferred_fixed_mode(intel_dp->attached_connector);
+       int mode_rate, max_rate;
+
+       mode_rate = intel_dp_link_required(fixed_mode->clock, 18);
+       max_rate = intel_dp_max_link_data_rate(intel_dp, link_rate, lane_count);
+       if (mode_rate > max_rate)
+               return false;
+
+       return true;
+}
+
+static int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
+                                                  int link_rate, u8 lane_count)
+{
+       struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+       int index;
+
+       /*
+        * TODO: Enable fallback on MST links once MST link compute can handle
+        * the fallback params.
+        */
+       if (intel_dp->is_mst) {
+               drm_err(&i915->drm, "Link Training Unsuccessful\n");
+               return -1;
+       }
+
+       if (intel_dp_is_edp(intel_dp) && !intel_dp->use_max_params) {
+               drm_dbg_kms(&i915->drm,
+                           "Retrying Link training for eDP with max parameters\n");
+               intel_dp->use_max_params = true;
+               return 0;
+       }
+
+       index = intel_dp_rate_index(intel_dp->common_rates,
+                                   intel_dp->num_common_rates,
+                                   link_rate);
+       if (index > 0) {
+               if (intel_dp_is_edp(intel_dp) &&
+                   !intel_dp_can_link_train_fallback_for_edp(intel_dp,
+                                                             intel_dp_common_rate(intel_dp, index - 1),
+                                                             lane_count)) {
+                       drm_dbg_kms(&i915->drm,
+                                   "Retrying Link training for eDP with same parameters\n");
+                       return 0;
+               }
+               intel_dp->link.max_rate = intel_dp_common_rate(intel_dp, index - 1);
+               intel_dp->link.max_lane_count = lane_count;
+       } else if (lane_count > 1) {
+               if (intel_dp_is_edp(intel_dp) &&
+                   !intel_dp_can_link_train_fallback_for_edp(intel_dp,
+                                                             intel_dp_max_common_rate(intel_dp),
+                                                             lane_count >> 1)) {
+                       drm_dbg_kms(&i915->drm,
+                                   "Retrying Link training for eDP with same parameters\n");
+                       return 0;
+               }
+               intel_dp->link.max_rate = intel_dp_max_common_rate(intel_dp);
+               intel_dp->link.max_lane_count = lane_count >> 1;
+       } else {
+               drm_err(&i915->drm, "Link Training Unsuccessful\n");
+               return -1;
+       }
+
+       return 0;
+}
+
 static void intel_dp_schedule_fallback_link_training(struct intel_dp *intel_dp,
                                                     const struct intel_crtc_state *crtc_state)
 {