#define ADI_AXI_ADC_REG_CHAN_CTRL_3(c)         (0x0418 + (c) * 0x40)
 #define   ADI_AXI_ADC_CHAN_PN_SEL_MASK         GENMASK(19, 16)
 
+#define ADI_AXI_ADC_REG_CHAN_USR_CTRL_2(c)     (0x0424 + (c) * 0x40)
+#define   ADI_AXI_ADC_CHAN_USR_CTRL_2_DEC_RATE_N_MASK          GENMASK(15, 0)
+
 /* IO Delays */
 #define ADI_AXI_ADC_REG_DELAY(l)               (0x0800 + (l) * 0x4)
 #define   AXI_ADC_DELAY_CTRL_MASK              GENMASK(4, 0)
        }
 }
 
+static int axi_adc_oversampling_ratio_set(struct iio_backend *back,
+                                         unsigned int chan,
+                                         unsigned int rate)
+{
+       struct adi_axi_adc_state *st = iio_backend_get_priv(back);
+
+       return regmap_update_bits(st->regmap,
+                                 ADI_AXI_ADC_REG_CHAN_USR_CTRL_2(chan),
+                                 ADI_AXI_ADC_CHAN_USR_CTRL_2_DEC_RATE_N_MASK,
+                                 FIELD_PREP(ADI_AXI_ADC_CHAN_USR_CTRL_2_DEC_RATE_N_MASK,
+                                            rate));
+}
+
 static int axi_adc_read_chan_status(struct adi_axi_adc_state *st, unsigned int chan,
                                    unsigned int *status)
 {
        .test_pattern_set = axi_adc_test_pattern_set,
        .chan_status = axi_adc_chan_status,
        .interface_type_get = axi_adc_interface_type_get,
+       .oversampling_ratio_set = axi_adc_oversampling_ratio_set,
        .debugfs_reg_access = iio_backend_debugfs_ptr(axi_adc_reg_access),
        .debugfs_print_chan_status = iio_backend_debugfs_ptr(axi_adc_debugfs_print_chan_status),
 };