}
 
        /* sample_regs_user never support XMM registers */
-       if (unlikely(event->attr.sample_regs_user & PEBS_XMM_REGS))
+       if (unlikely(event->attr.sample_regs_user & PERF_REG_EXTENDED_MASK))
                return -EINVAL;
        /*
         * Besides the general purpose registers, XMM registers may
         * be collected in PEBS on some platforms, e.g. Icelake
         */
-       if (unlikely(event->attr.sample_regs_intr & PEBS_XMM_REGS)) {
+       if (unlikely(event->attr.sample_regs_intr & PERF_REG_EXTENDED_MASK)) {
                if (x86_pmu.pebs_no_xmm_regs)
                        return -EINVAL;
 
 
                pebs_data_cfg |= PEBS_DATACFG_GP;
 
        if ((sample_type & PERF_SAMPLE_REGS_INTR) &&
-           (attr->sample_regs_intr & PEBS_XMM_REGS))
+           (attr->sample_regs_intr & PERF_REG_EXTENDED_MASK))
                pebs_data_cfg |= PEBS_DATACFG_XMMS;
 
        if (sample_type & PERF_SAMPLE_BRANCH_STACK) {
 
         (1ULL << PERF_REG_X86_R14)   | \
         (1ULL << PERF_REG_X86_R15))
 
-#define PEBS_XMM_REGS                   \
-       ((1ULL << PERF_REG_X86_XMM0)  | \
-        (1ULL << PERF_REG_X86_XMM1)  | \
-        (1ULL << PERF_REG_X86_XMM2)  | \
-        (1ULL << PERF_REG_X86_XMM3)  | \
-        (1ULL << PERF_REG_X86_XMM4)  | \
-        (1ULL << PERF_REG_X86_XMM5)  | \
-        (1ULL << PERF_REG_X86_XMM6)  | \
-        (1ULL << PERF_REG_X86_XMM7)  | \
-        (1ULL << PERF_REG_X86_XMM8)  | \
-        (1ULL << PERF_REG_X86_XMM9)  | \
-        (1ULL << PERF_REG_X86_XMM10) | \
-        (1ULL << PERF_REG_X86_XMM11) | \
-        (1ULL << PERF_REG_X86_XMM12) | \
-        (1ULL << PERF_REG_X86_XMM13) | \
-        (1ULL << PERF_REG_X86_XMM14) | \
-        (1ULL << PERF_REG_X86_XMM15))
-
 /*
  * Per register state.
  */