]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
wifi: iwlwifi: move _iwl_trans_set_bits_mask utilities
authorRotem Kerem <rotem.kerem@intel.com>
Thu, 12 Jun 2025 11:48:56 +0000 (14:48 +0300)
committerMiri Korenblit <miriam.rachel.korenblit@intel.com>
Wed, 25 Jun 2025 07:57:33 +0000 (10:57 +0300)
Move set_bits_mask utility functions to utils.h as they are generic
utilities and is not hardware-dependent.

Signed-off-by: Rotem Kerem <rotem.kerem@intel.com>
Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
Link: https://patch.msgid.link/20250612144708.4049f1eda9fa.Iddcb6f7437beee2cfe232315384d8517b40c56d1@changeid
drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/internal.h
drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/trans.c
drivers/net/wireless/intel/iwlwifi/pcie/gen1_2/tx.c
drivers/net/wireless/intel/iwlwifi/pcie/utils.h

index 007f63a8d3c84ffad57e9f83fe5af6596863f92e..23c0771a4231a7dc05f6d312af9ec1d8376c76b8 100644 (file)
@@ -1034,33 +1034,6 @@ static inline bool iwl_is_rfkill_set(struct iwl_trans *trans)
                CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
 }
 
-static inline void __iwl_trans_pcie_set_bits_mask(struct iwl_trans *trans,
-                                                 u32 reg, u32 mask, u32 value)
-{
-       u32 v;
-
-#ifdef CONFIG_IWLWIFI_DEBUG
-       WARN_ON_ONCE(value & ~mask);
-#endif
-
-       v = iwl_read32(trans, reg);
-       v &= ~mask;
-       v |= value;
-       iwl_write32(trans, reg, v);
-}
-
-static inline void __iwl_trans_pcie_clear_bit(struct iwl_trans *trans,
-                                             u32 reg, u32 mask)
-{
-       __iwl_trans_pcie_set_bits_mask(trans, reg, mask, 0);
-}
-
-static inline void __iwl_trans_pcie_set_bit(struct iwl_trans *trans,
-                                           u32 reg, u32 mask)
-{
-       __iwl_trans_pcie_set_bits_mask(trans, reg, mask, mask);
-}
-
 static inline bool iwl_pcie_dbg_on(struct iwl_trans *trans)
 {
        return (trans->dbg.dest_tlv || iwl_trans_dbg_ini_valid(trans));
index 174bfc66c285ec7d614d20c1c5968c932c2f2f3e..97e90cbeb6cd695f9ac1c52748bcc588456de6f9 100644 (file)
@@ -294,8 +294,8 @@ static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans)
        u32 dl_cfg_reg;
 
        /* Force XTAL ON */
-       __iwl_trans_pcie_set_bit(trans, CSR_GP_CNTRL,
-                                CSR_GP_CNTRL_REG_FLAG_XTAL_ON);
+       iwl_trans_set_bit(trans, CSR_GP_CNTRL,
+                         CSR_GP_CNTRL_REG_FLAG_XTAL_ON);
 
        ret = iwl_trans_pcie_sw_reset(trans, true);
 
@@ -304,8 +304,8 @@ static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans)
 
        if (WARN_ON(ret)) {
                /* Release XTAL ON request */
-               __iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
-                                          CSR_GP_CNTRL_REG_FLAG_XTAL_ON);
+               iwl_trans_clear_bit(trans, CSR_GP_CNTRL,
+                                   CSR_GP_CNTRL_REG_FLAG_XTAL_ON);
                return;
        }
 
@@ -356,12 +356,12 @@ static void iwl_pcie_apm_lp_xtal_enable(struct iwl_trans *trans)
        iwl_clear_bit(trans, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 
        /* Activates XTAL resources monitor */
-       __iwl_trans_pcie_set_bit(trans, CSR_MONITOR_CFG_REG,
-                                CSR_MONITOR_XTAL_RESOURCES);
+       iwl_trans_set_bit(trans, CSR_MONITOR_CFG_REG,
+                         CSR_MONITOR_XTAL_RESOURCES);
 
        /* Release XTAL ON request */
-       __iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
-                                  CSR_GP_CNTRL_REG_FLAG_XTAL_ON);
+       iwl_trans_clear_bit(trans, CSR_GP_CNTRL,
+                           CSR_GP_CNTRL_REG_FLAG_XTAL_ON);
        udelay(10);
 
        /* Release APMG XTAL */
@@ -2330,7 +2330,7 @@ bool __iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans, bool silent)
        }
 
        /* this bit wakes up the NIC */
-       __iwl_trans_pcie_set_bit(trans, CSR_GP_CNTRL, write);
+       iwl_trans_set_bit(trans, CSR_GP_CNTRL, write);
        if (trans->mac_cfg->device_family >= IWL_DEVICE_FAMILY_8000)
                udelay(2);
 
@@ -2419,11 +2419,11 @@ iwl_trans_pcie_release_nic_access(struct iwl_trans *trans)
        if (trans_pcie->cmd_hold_nic_awake)
                goto out;
        if (trans->mac_cfg->device_family >= IWL_DEVICE_FAMILY_BZ)
-               __iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
-                                          CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ);
+               iwl_trans_clear_bit(trans, CSR_GP_CNTRL,
+                                   CSR_GP_CNTRL_REG_FLAG_BZ_MAC_ACCESS_REQ);
        else
-               __iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
-                                          CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
+               iwl_trans_clear_bit(trans, CSR_GP_CNTRL,
+                                   CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
        /*
         * Above we read the CSR_GP_CNTRL register, which will flush
         * any previous writes, but we need the write that clears the
@@ -2604,7 +2604,7 @@ void iwl_trans_pcie_set_bits_mask(struct iwl_trans *trans, u32 reg,
        struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
 
        spin_lock_bh(&trans_pcie->reg_lock);
-       __iwl_trans_pcie_set_bits_mask(trans, reg, mask, value);
+       _iwl_trans_set_bits_mask(trans, reg, mask, value);
        spin_unlock_bh(&trans_pcie->reg_lock);
 }
 
index e39451d27a93198272df926b784eaaea26da68fc..6b052b36dfa7808e18e2c7b17b08f3d27901c4b3 100644 (file)
@@ -25,6 +25,7 @@
 #include "iwl-op-mode.h"
 #include "internal.h"
 #include "fw/api/tx.h"
+#include "pcie/utils.h"
 
 /*************** DMA-QUEUE-GENERAL-FUNCTIONS  *****
  * DMA services
@@ -203,8 +204,8 @@ static void iwl_pcie_clear_cmd_in_flight(struct iwl_trans *trans)
        }
 
        trans_pcie->cmd_hold_nic_awake = false;
-       __iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
-                                  CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
+       iwl_trans_clear_bit(trans, CSR_GP_CNTRL,
+                           CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
        spin_unlock(&trans_pcie->reg_lock);
 }
 
index af2a2eec7ec54cfb7c54c01c34c27400668925d8..031dfdf4bba460839d2ad85b8658a95c8d6c55b9 100644 (file)
@@ -8,4 +8,31 @@
 
 void iwl_trans_pcie_dump_regs(struct iwl_trans *trans, struct pci_dev *pdev);
 
+static inline void _iwl_trans_set_bits_mask(struct iwl_trans *trans,
+                                           u32 reg, u32 mask, u32 value)
+{
+       u32 v;
+
+#ifdef CONFIG_IWLWIFI_DEBUG
+       WARN_ON_ONCE(value & ~mask);
+#endif
+
+       v = iwl_read32(trans, reg);
+       v &= ~mask;
+       v |= value;
+       iwl_write32(trans, reg, v);
+}
+
+static inline void iwl_trans_clear_bit(struct iwl_trans *trans,
+                                      u32 reg, u32 mask)
+{
+       _iwl_trans_set_bits_mask(trans, reg, mask, 0);
+}
+
+static inline void iwl_trans_set_bit(struct iwl_trans *trans,
+                                    u32 reg, u32 mask)
+{
+       _iwl_trans_set_bits_mask(trans, reg, mask, mask);
+}
+
 #endif /* __iwl_pcie_utils_h__ */