* Patch by David Müller <d.mueller@elsoft.ch>:

 - fix some little bugs and typos in the code for the SMDK2410 eval board
 - add (compile time selectable) support for LV400 and LV800 flashs.

diff --git a/CHANGELOG b/CHANGELOG
index cf94e5f5584f3c7c3f732b5d6e7223ecf73d147e..755d336bdc170fa56dae9a107119c20b43f080eb 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,11 @@
 Recent Modifications
 ======================================================================
 
+* Patch by David Müller <d.mueller@elsoft.ch>:
+
+ - fix some little bugs and typos in the code for the SMDK2410 eval board
+ - add (compile time selectable) support for LV400 and LV800 flashs.
+
 * Big network patch by Robert Kaiser <rob@sysgo.de>:
 
   - Bugfixes in bootp code: need to swap Netmask, Gateway IP, etc.

diff --git a/board/smdk2410/config.mk b/board/smdk2410/config.mk
index aba735da3ef0416875a5b76be34bc06fdee745b3..e61bea0e4296b83c3b2583ca070d258dc3d5db55 100644 (file)
--- a/board/smdk2410/config.mk
+++ b/board/smdk2410/config.mk
@@ -9,17 +9,17 @@
 #
 
 #
-# SMDK2410 has 1 bank of 32 MB DRAM
+# SMDK2410 has 1 bank of 64 MB DRAM
 #
-# 3000'0000 to 3200'0000
+# 3000'0000 to 3400'0000
 #
-# Linux-Kernel is expected to be at 3000'0000, entry 3000'0000
+# Linux-Kernel is expected to be at 3000'8000, entry 3000'8000
 # optionally with a ramdisk at 3080'0000
 #
-# we load ourself to 31F0'0000
+# we load ourself to 33F0'0000
 #
-# download areas is 3100'0000
+# download areas is 3300'0000
 #
 
 
-TEXT_BASE = 0x31F00000
+TEXT_BASE = 0x33F00000

diff --git a/board/smdk2410/flash.c b/board/smdk2410/flash.c
index 30743010325024a46b95664ae8d619f23a059b84..f0021d85f5510f7a180fac0feb506f33a29d4ded 100644 (file)
--- a/board/smdk2410/flash.c
+++ b/board/smdk2410/flash.c
@@ -65,8 +65,15 @@ ulong flash_init(bd_t *bd)
     {
        ulong flashbase = 0;
        flash_info[i].flash_id =
+#if defined(CONFIG_AMD_LV400)
          (AMD_MANUFACT & FLASH_VENDMASK) |
          (AMD_ID_LV400B & FLASH_TYPEMASK);
+#elif defined(CONFIG_AMD_LV800)
+         (AMD_MANUFACT & FLASH_VENDMASK) |
+         (AMD_ID_LV800B & FLASH_TYPEMASK);
+#else
+#error "Unknown flash configured"
+#endif
        flash_info[i].size = FLASH_BANK_SIZE;
        flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
        memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
@@ -76,7 +83,6 @@ ulong flash_init(bd_t *bd)
          panic("configured to many flash banks!\n");
        for (j = 0; j < flash_info[i].sector_count; j++)
        {
-
            if (j <= 3)
            {
                /* 1st one is 16 KB */

diff --git a/board/smdk2410/smdk2410.c b/board/smdk2410/smdk2410.c
index acffc8a3d7256fa72dc34f203405dfe3e3f2ecdc..b8995b0888ff16bf297efe450d5a8ef4ee0479e8 100644 (file)
--- a/board/smdk2410/smdk2410.c
+++ b/board/smdk2410/smdk2410.c
@@ -108,6 +108,9 @@ int board_init(bd_t *bd)
     /* adress of boot parameters */
     bd->bi_boot_params = 0x30000100;
 
+    icache_enable();
+    dcache_enable();
+    
     return 1;
 }
 
@@ -117,4 +120,3 @@ int dram_init(bd_t *bd)
     bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
     return PHYS_SDRAM_1_SIZE;
 }
-

diff --git a/include/configs/config_smdk2410.h b/include/configs/config_smdk2410.h
index 61c75ddf7ad6229e1d9c4706f2f0e81ea0ca537f..bcc35274017f18df53f71aeaf740755056d4abd2 100644 (file)
--- a/include/configs/config_smdk2410.h
+++ b/include/configs/config_smdk2410.h
@@ -41,7 +41,7 @@
  */
 #define CONFIG_ARM920T         1       /* This is an ARM920T Core      */
 #define        CONFIG_S3C2410          1       /* in a SAMSUNG S3C2410 SoC     */
-#define CONFIG_SMDK2410                1       /* on an SAMSUNG SMDK2410 Board */
+#define CONFIG_SMDK2410                1       /* on a SAMSUNG SMDK2410 Board  */
 
 #define USE_920T_MMU           1
 #undef CONFIG_USE_IRQ                  /* we don't need IRQ/FIQ stuff */
@@ -103,11 +103,11 @@
 #define CFG_BARGSIZE           CFG_CBSIZE      /* Boot Argument Buffer Size    */
 
 #define CFG_MEMTEST_START      0x30000000      /* memtest works on     */
-#define CFG_MEMTEST_END                0x31F00000      /* 31 MB in DRAM        */
+#define CFG_MEMTEST_END                0x33F00000      /* 63 MB in DRAM        */
 
 #undef  CFG_CLKS_IN_HZ         /* everything, incl board info, in Hz */
 
-#define        CFG_LOAD_ADDR           0x31000000      /* default load address */
+#define        CFG_LOAD_ADDR           0x33000000      /* default load address */
 
 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
 /* it to wrap 100 times (total 1562500) to get 1 sec. */
@@ -152,24 +152,35 @@ struct bd_info_ext
  */
 #define CONFIG_NR_DRAM_BANKS   1          /* we have 1 bank of DRAM */
 #define PHYS_SDRAM_1           0x30000000 /* SDRAM Bank #1 */
-#define PHYS_SDRAM_1_SIZE      0x02000000 /* 32 MB */
+#define PHYS_SDRAM_1_SIZE      0x04000000 /* 64 MB */
 
 #define PHYS_FLASH_1           0x00000000 /* Flash Bank #1 */
-#define PHYS_FLASH_SIZE                0x00100000 /* 1 MB */
 
 #define CFG_FLASH_BASE         PHYS_FLASH_1
 
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
  */
+
+#define CONFIG_AMD_LV400       1       /* uncomment this if you have a LV400 flash */
+//#define CONFIG_AMD_LV800     1       /* uncomment this if you have a LV800 flash */
+
 #define CFG_MAX_FLASH_BANKS    1       /* max number of memory banks */
+#ifdef CONFIG_AMD_LV800
+#define PHYS_FLASH_SIZE                0x00100000 /* 1MB */
 #define CFG_MAX_FLASH_SECT     (19)    /* max number of sectors on one chip */
+#define CFG_ENV_ADDR           (CFG_FLASH_BASE + 0x0F0000) /* addr of environment */
+#endif
+#ifdef CONFIG_AMD_LV400
+#define PHYS_FLASH_SIZE                0x00080000 /* 512KB */
+#define CFG_MAX_FLASH_SECT     (11)    /* max number of sectors on one chip */
+#define CFG_ENV_ADDR           (CFG_FLASH_BASE + 0x070000) /* addr of environment */
+#endif
 
 /* timeout values are in ticks */
 #define CFG_FLASH_ERASE_TOUT   (5*CFG_HZ) /* Timeout for Flash Erase */
 #define CFG_FLASH_WRITE_TOUT   (5*CFG_HZ) /* Timeout for Flash Write */
 
-#define CFG_ENV_ADDR           (CFG_FLASH_BASE + 0x0F0000)     /* Addr of Environment Sector   */
 #define CFG_ENV_SIZE           0x10000 /* Total Size of Environment Sector */
 
 #endif /* __CONFIG_H */