/* SEV Information Request/Response */
 #define GHCB_MSR_SEV_INFO_RESP         0x001
 #define GHCB_MSR_SEV_INFO_REQ          0x002
-#define GHCB_MSR_VER_MAX_POS           48
-#define GHCB_MSR_VER_MAX_MASK          0xffff
-#define GHCB_MSR_VER_MIN_POS           32
-#define GHCB_MSR_VER_MIN_MASK          0xffff
-#define GHCB_MSR_CBIT_POS              24
-#define GHCB_MSR_CBIT_MASK             0xff
-#define GHCB_MSR_SEV_INFO(_max, _min, _cbit)                           \
-       ((((_max) & GHCB_MSR_VER_MAX_MASK) << GHCB_MSR_VER_MAX_POS) |   \
-        (((_min) & GHCB_MSR_VER_MIN_MASK) << GHCB_MSR_VER_MIN_POS) |   \
-        (((_cbit) & GHCB_MSR_CBIT_MASK) << GHCB_MSR_CBIT_POS) |        \
+
+#define GHCB_MSR_SEV_INFO(_max, _min, _cbit)   \
+       /* GHCBData[63:48] */                   \
+       ((((_max) & 0xffff) << 48) |            \
+        /* GHCBData[47:32] */                  \
+        (((_min) & 0xffff) << 32) |            \
+        /* GHCBData[31:24] */                  \
+        (((_cbit) & 0xff)  << 24) |            \
         GHCB_MSR_SEV_INFO_RESP)
+
 #define GHCB_MSR_INFO(v)               ((v) & 0xfffUL)
-#define GHCB_MSR_PROTO_MAX(v)          (((v) >> GHCB_MSR_VER_MAX_POS) & GHCB_MSR_VER_MAX_MASK)
-#define GHCB_MSR_PROTO_MIN(v)          (((v) >> GHCB_MSR_VER_MIN_POS) & GHCB_MSR_VER_MIN_MASK)
+#define GHCB_MSR_PROTO_MAX(v)          (((v) >> 48) & 0xffff)
+#define GHCB_MSR_PROTO_MIN(v)          (((v) >> 32) & 0xffff)
 
 /* CPUID Request/Response */
 #define GHCB_MSR_CPUID_REQ             0x004
 #define GHCB_CPUID_REQ_EBX             1
 #define GHCB_CPUID_REQ_ECX             2
 #define GHCB_CPUID_REQ_EDX             3
-#define GHCB_CPUID_REQ(fn, reg)                \
-               (GHCB_MSR_CPUID_REQ | \
-               (((unsigned long)reg & GHCB_MSR_CPUID_REG_MASK) << GHCB_MSR_CPUID_REG_POS) | \
-               (((unsigned long)fn) << GHCB_MSR_CPUID_FUNC_POS))
+#define GHCB_CPUID_REQ(fn, reg)                                \
+       /* GHCBData[11:0] */                            \
+       (GHCB_MSR_CPUID_REQ |                           \
+       /* GHCBData[31:12] */                           \
+       (((unsigned long)(reg) & 0x3) << 30) |          \
+       /* GHCBData[63:32] */                           \
+       (((unsigned long)fn) << 32))
 
 /* AP Reset Hold */
-#define GHCB_MSR_AP_RESET_HOLD_REQ             0x006
-#define GHCB_MSR_AP_RESET_HOLD_RESP            0x007
+#define GHCB_MSR_AP_RESET_HOLD_REQ     0x006
+#define GHCB_MSR_AP_RESET_HOLD_RESP    0x007
 
 /* GHCB Hypervisor Feature Request/Response */
-#define GHCB_MSR_HV_FT_REQ                     0x080
-#define GHCB_MSR_HV_FT_RESP                    0x081
+#define GHCB_MSR_HV_FT_REQ             0x080
+#define GHCB_MSR_HV_FT_RESP            0x081
 
 #define GHCB_MSR_TERM_REQ              0x100
 #define GHCB_MSR_TERM_REASON_SET_POS   12
 #define GHCB_MSR_TERM_REASON_SET_MASK  0xf
 #define GHCB_MSR_TERM_REASON_POS       16
 #define GHCB_MSR_TERM_REASON_MASK      0xff
-#define GHCB_SEV_TERM_REASON(reason_set, reason_val)                                             \
-       (((((u64)reason_set) &  GHCB_MSR_TERM_REASON_SET_MASK) << GHCB_MSR_TERM_REASON_SET_POS) | \
-       ((((u64)reason_val) & GHCB_MSR_TERM_REASON_MASK) << GHCB_MSR_TERM_REASON_POS))
+
+#define GHCB_SEV_TERM_REASON(reason_set, reason_val)   \
+       /* GHCBData[15:12] */                           \
+       (((((u64)reason_set) &  0xf) << 12) |           \
+        /* GHCBData[23:16] */                          \
+       ((((u64)reason_val) & 0xff) << 16))
 
 #define GHCB_SEV_ES_GEN_REQ            0
 #define GHCB_SEV_ES_PROT_UNSUPPORTED   1