security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
 }
 
-static void pnv_setup_rfi_flush(void)
+static void pnv_setup_security_mitigations(void)
 {
        struct device_node *np, *fw_features;
        enum l1d_flush_type type;
        enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
                 security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS);
        setup_uaccess_flush(enable);
+
+       setup_stf_barrier();
 }
 
 static void __init pnv_check_guarded_cores(void)
 {
        set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 
-       pnv_setup_rfi_flush();
-       setup_stf_barrier();
+       pnv_setup_security_mitigations();
 
        /* Initialize SMP */
        pnv_smp_init();
 
 
        cpus_read_unlock();
 
-       /* Possibly switch to a new RFI flush type */
-       pseries_setup_rfi_flush();
+       /* Possibly switch to a new L1 flush type */
+       pseries_setup_security_mitigations();
 
        /* Reinitialise system information for hv-24x7 */
        read_24x7_sys_info();
 
 
 int dlpar_workqueue_init(void);
 
-void pseries_setup_rfi_flush(void);
+void pseries_setup_security_mitigations(void);
 void pseries_lpar_read_hblkrm_characteristics(void);
 
 #endif /* _PSERIES_PSERIES_H */
 
                security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
 }
 
-void pseries_setup_rfi_flush(void)
+void pseries_setup_security_mitigations(void)
 {
        struct h_cpu_char_result result;
        enum l1d_flush_type types;
        enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
                 security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS);
        setup_uaccess_flush(enable);
+
+       setup_stf_barrier();
 }
 
 #ifdef CONFIG_PCI_IOV
 
        fwnmi_init();
 
-       pseries_setup_rfi_flush();
-       setup_stf_barrier();
+       pseries_setup_security_mitigations();
        pseries_lpar_read_hblkrm_characteristics();
 
        /* By default, only probe PCI (can be overridden by rtas_pci) */