enum intel_display_power_domain domain);
 void intel_display_power_put(struct drm_i915_private *dev_priv,
                             enum intel_display_power_domain domain);
+
+static inline void
+assert_rpm_device_not_suspended(struct drm_i915_private *dev_priv)
+{
+       WARN_ONCE(dev_priv->pm.suspended,
+                 "Device suspended during HW access\n");
+}
+
+static inline void
+assert_rpm_wakelock_held(struct drm_i915_private *dev_priv)
+{
+       assert_rpm_device_not_suspended(dev_priv);
+}
+
 void intel_runtime_pm_get(struct drm_i915_private *dev_priv);
 void intel_runtime_pm_get_noresume(struct drm_i915_private *dev_priv);
 void intel_runtime_pm_put(struct drm_i915_private *dev_priv);
 
        return "unknown";
 }
 
-static void
-assert_device_not_suspended(struct drm_i915_private *dev_priv)
-{
-       WARN_ONCE(dev_priv->pm.suspended, "Device suspended\n");
-}
-
 static inline void
 fw_domain_reset(const struct intel_uncore_forcewake_domain *d)
 {
        struct intel_uncore_forcewake_domain *domain = (void *)arg;
        unsigned long irqflags;
 
-       assert_device_not_suspended(domain->i915);
+       assert_rpm_device_not_suspended(domain->i915);
 
        spin_lock_irqsave(&domain->i915->uncore.lock, irqflags);
        if (WARN_ON(domain->wake_count == 0))
 
 #define GEN2_READ_HEADER(x) \
        u##x val = 0; \
-       assert_device_not_suspended(dev_priv);
+       assert_rpm_wakelock_held(dev_priv);
 
 #define GEN2_READ_FOOTER \
        trace_i915_reg_rw(false, reg, val, sizeof(val), trace); \
        u32 offset = i915_mmio_reg_offset(reg); \
        unsigned long irqflags; \
        u##x val = 0; \
-       assert_device_not_suspended(dev_priv); \
+       assert_rpm_wakelock_held(dev_priv); \
        spin_lock_irqsave(&dev_priv->uncore.lock, irqflags)
 
 #define GEN6_READ_FOOTER \
 #define VGPU_READ_HEADER(x) \
        unsigned long irqflags; \
        u##x val = 0; \
-       assert_device_not_suspended(dev_priv); \
+       assert_rpm_device_not_suspended(dev_priv); \
        spin_lock_irqsave(&dev_priv->uncore.lock, irqflags)
 
 #define VGPU_READ_FOOTER \
 
 #define GEN2_WRITE_HEADER \
        trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
-       assert_device_not_suspended(dev_priv); \
+       assert_rpm_wakelock_held(dev_priv); \
 
 #define GEN2_WRITE_FOOTER
 
        u32 offset = i915_mmio_reg_offset(reg); \
        unsigned long irqflags; \
        trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
-       assert_device_not_suspended(dev_priv); \
+       assert_rpm_wakelock_held(dev_priv); \
        spin_lock_irqsave(&dev_priv->uncore.lock, irqflags)
 
 #define GEN6_WRITE_FOOTER \
 #define VGPU_WRITE_HEADER \
        unsigned long irqflags; \
        trace_i915_reg_rw(true, reg, val, sizeof(val), trace); \
-       assert_device_not_suspended(dev_priv); \
+       assert_rpm_device_not_suspended(dev_priv); \
        spin_lock_irqsave(&dev_priv->uncore.lock, irqflags)
 
 #define VGPU_WRITE_FOOTER \