memset(__pdesc, 0, _size);      \
 } while (0);
 
-#define RX_HAL_IS_CCK_RATE(_pdesc)\
-       (_pdesc->rxmcs == DESC92_RATE1M ||              \
-        _pdesc->rxmcs == DESC92_RATE2M ||              \
-        _pdesc->rxmcs == DESC92_RATE5_5M ||            \
-        _pdesc->rxmcs == DESC92_RATE11M)
-
 struct rx_fwinfo_92c {
        u8 gain_trsw[4];
        u8 pwdb_all;
 
 
 u32 rtl92c_get_txdma_status(struct ieee80211_hw *hw);
 
-#define RX_HAL_IS_CCK_RATE(_pdesc)\
-       (GET_RX_DESC_RX_MCS(_pdesc) == DESC92_RATE1M ||\
-        GET_RX_DESC_RX_MCS(_pdesc) == DESC92_RATE2M ||\
-        GET_RX_DESC_RX_MCS(_pdesc) == DESC92_RATE5_5M ||\
-        GET_RX_DESC_RX_MCS(_pdesc) == DESC92_RATE11M)
-
 struct rx_fwinfo_92c {
        u8 gain_trsw[4];
        u8 pwdb_all;
 
                memset((void *)__pdesc, 0, _size);      \
 } while (0);
 
-#define RX_HAL_IS_CCK_RATE(_pdesc)\
-       (_pdesc->rxmcs == DESC92_RATE1M ||              \
-        _pdesc->rxmcs == DESC92_RATE2M ||              \
-        _pdesc->rxmcs == DESC92_RATE5_5M ||            \
-        _pdesc->rxmcs == DESC92_RATE11M)
-
 /* For 92D early mode */
 #define SET_EARLYMODE_PKTNUM(__paddr, __value)         \
        SET_BITS_OFFSET_LE(__paddr, 0, 3, __value)
 
 #define SET_RX_STATUS__DESC_BUFF_ADDR(__pdesc, __val)  \
        SET_BITS_OFFSET_LE(__pdesc + 24, 0, 32, __val)
 
-#define RX_HAL_IS_CCK_RATE(_pdesc)\
+#define SE_RX_HAL_IS_CCK_RATE(_pdesc)\
        (GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE1M ||  \
         GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE2M ||  \
         GET_RX_STATUS_DESC_RX_MCS(_pdesc) == DESC92_RATE5_5M ||\
 
        bool in_powersavemode = false;
        bool is_cck_rate;
 
-       is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
+       is_cck_rate = SE_RX_HAL_IS_CCK_RATE(pdesc);
        pstats->packet_matchbssid = packet_match_bssid;
        pstats->packet_toself = packet_toself;
        pstats->is_cck = is_cck_rate;
 
 #define IS_HARDWARE_TYPE_8723U(rtlhal)                 \
        (rtlhal->hw_type == HARDWARE_TYPE_RTL8723U)
 
+#define RX_HAL_IS_CCK_RATE(_pdesc)\
+       (_pdesc->rxmcs == DESC92_RATE1M ||              \
+        _pdesc->rxmcs == DESC92_RATE2M ||              \
+        _pdesc->rxmcs == DESC92_RATE5_5M ||            \
+        _pdesc->rxmcs == DESC92_RATE11M)
+
 enum scan_operation_backup_opt {
        SCAN_OPT_BACKUP = 0,
        SCAN_OPT_RESTORE,