ARM: dts: sun8i: r40: Move SPI device nodes based on address order

When the SPI device nodes were added, they were added in the wrong
location in the device tree file. The device nodes should be sorted
by register address.

Move the devices node to their correct positions within the file.

Fixes: 554581b79139 ("ARM: dts: sun8i: R40: Add SPI controllers nodes and pinmuxes")
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 43c92391bd2bdb945f2a5eab87f1ec8d26127ccf..a9d5d6ddbd71d2b8535f906024a9934fecba9657 100644 (file)
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -181,6 +181,32 @@
                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
                };
 
+               spi0: spi@1c05000 {
+                       compatible = "allwinner,sun8i-r40-spi",
+                                    "allwinner,sun8i-h3-spi";
+                       reg = <0x01c05000 0x1000>;
+                       interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
+                       clock-names = "ahb", "mod";
+                       resets = <&ccu RST_BUS_SPI0>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
+               spi1: spi@1c06000 {
+                       compatible = "allwinner,sun8i-r40-spi",
+                                    "allwinner,sun8i-h3-spi";
+                       reg = <0x01c06000 0x1000>;
+                       interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
+                       clock-names = "ahb", "mod";
+                       resets = <&ccu RST_BUS_SPI1>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                csi0: csi@1c09000 {
                        compatible = "allwinner,sun8i-r40-csi0",
                                     "allwinner,sun7i-a20-csi0";
@@ -290,6 +316,19 @@
                        resets = <&ccu RST_BUS_CE>;
                };
 
+               spi2: spi@1c17000 {
+                       compatible = "allwinner,sun8i-r40-spi",
+                                    "allwinner,sun8i-h3-spi";
+                       reg = <0x01c17000 0x1000>;
+                       interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
+                       clock-names = "ahb", "mod";
+                       resets = <&ccu RST_BUS_SPI2>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                ahci: sata@1c18000 {
                        compatible = "allwinner,sun8i-r40-ahci";
                        reg = <0x01c18000 0x1000>;
@@ -346,6 +385,19 @@
                        status = "disabled";
                };
 
+               spi3: spi@1c1f000 {
+                       compatible = "allwinner,sun8i-r40-spi",
+                                    "allwinner,sun8i-h3-spi";
+                       reg = <0x01c1f000 0x1000>;
+                       interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>;
+                       clock-names = "ahb", "mod";
+                       resets = <&ccu RST_BUS_SPI3>;
+                       status = "disabled";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+
                ccu: clock@1c20000 {
                        compatible = "allwinner,sun8i-r40-ccu";
                        reg = <0x01c20000 0x400>;
@@ -663,58 +715,6 @@
                        #size-cells = <0>;
                };
 
-               spi0: spi@1c05000 {
-                       compatible = "allwinner,sun8i-r40-spi",
-                                    "allwinner,sun8i-h3-spi";
-                       reg = <0x01c05000 0x1000>;
-                       interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
-                       clock-names = "ahb", "mod";
-                       resets = <&ccu RST_BUS_SPI0>;
-                       status = "disabled";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-               };
-
-               spi1: spi@1c06000 {
-                       compatible = "allwinner,sun8i-r40-spi",
-                                    "allwinner,sun8i-h3-spi";
-                       reg = <0x01c06000 0x1000>;
-                       interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
-                       clock-names = "ahb", "mod";
-                       resets = <&ccu RST_BUS_SPI1>;
-                       status = "disabled";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-               };
-
-               spi2: spi@1c17000 {
-                       compatible = "allwinner,sun8i-r40-spi",
-                                    "allwinner,sun8i-h3-spi";
-                       reg = <0x01c17000 0x1000>;
-                       interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_BUS_SPI2>, <&ccu CLK_SPI2>;
-                       clock-names = "ahb", "mod";
-                       resets = <&ccu RST_BUS_SPI2>;
-                       status = "disabled";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-               };
-
-               spi3: spi@1c1f000 {
-                       compatible = "allwinner,sun8i-r40-spi",
-                                    "allwinner,sun8i-h3-spi";
-                       reg = <0x01c1f000 0x1000>;
-                       interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_BUS_SPI3>, <&ccu CLK_SPI3>;
-                       clock-names = "ahb", "mod";
-                       resets = <&ccu RST_BUS_SPI3>;
-                       status = "disabled";
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-               };
-
                gmac: ethernet@1c50000 {
                        compatible = "allwinner,sun8i-r40-gmac";
                        syscon = <&ccu>;