]> www.infradead.org Git - linux.git/commitdiff
arm64: dts: renesas: rzg2ul: Set Ethernet PVDD to 1.8V
authorPaul Barker <paul.barker.ct@bp.renesas.com>
Tue, 25 Jun 2024 20:03:16 +0000 (21:03 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 2 Aug 2024 09:13:24 +0000 (11:13 +0200)
On the RZ/G2UL & RZ/Five SMARC SOMs, the RGMII interface between the SoC
and the Ethernet PHY operates at 1.8V.

The power supply for this interface may be correctly configured in
u-boot, but the kernel should not be relying on this. Now that the
RZ/G2L pinctrl driver supports configuring the Ethernet power supply
voltage, we can simply specify the desired voltage in the device tree.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20240625200316.4282-10-paul.barker.ct@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi

index 417f49090b1599724c40a981d077d07281a2f931..79443fb3f58103045019f0cf9001dc897240d1c6 100644 (file)
        eth0_pins: eth0 {
                txc {
                        pinmux = <RZG2L_PORT_PINMUX(1, 0, 1)>; /* ET0_TXC */
+                       power-source = <1800>;
                        output-enable;
                };
 
                                 <RZG2L_PORT_PINMUX(3, 2, 1)>, /* ET0_RXD0 */
                                 <RZG2L_PORT_PINMUX(3, 3, 1)>, /* ET0_RXD1 */
                                 <RZG2L_PORT_PINMUX(4, 0, 1)>, /* ET0_RXD2 */
-                                <RZG2L_PORT_PINMUX(4, 1, 1)>, /* ET0_RXD3 */
-                                <RZG2L_PORT_PINMUX(5, 1, 7)>; /* IRQ2 */
+                                <RZG2L_PORT_PINMUX(4, 1, 1)>; /* ET0_RXD3 */
+                       power-source = <1800>;
+               };
+
+               irq {
+                       pinmux = <RZG2L_PORT_PINMUX(5, 1, 7)>; /* IRQ2 */
                };
        };
 
        eth1_pins: eth1 {
                txc {
                        pinmux = <RZG2L_PORT_PINMUX(7, 0, 1)>; /* ET1_TXC */
+                       power-source = <1800>;
                        output-enable;
                };
 
                                 <RZG2L_PORT_PINMUX(9, 1, 1)>, /* ET1_RXD0 */
                                 <RZG2L_PORT_PINMUX(9, 2, 1)>, /* ET1_RXD1 */
                                 <RZG2L_PORT_PINMUX(9, 3, 1)>, /* ET1_RXD2 */
-                                <RZG2L_PORT_PINMUX(10, 0, 1)>, /* ET1_RXD3 */
-                                <RZG2L_PORT_PINMUX(18, 5, 1)>; /* IRQ7 */
+                                <RZG2L_PORT_PINMUX(10, 0, 1)>; /* ET1_RXD3 */
+                       power-source = <1800>;
+               };
+
+               irq {
+                       pinmux = <RZG2L_PORT_PINMUX(18, 5, 1)>; /* IRQ7 */
                };
        };