#define X86_FEATURE_CX16      (4*32+13) /* CMPXCHG16B */
  #define X86_FEATURE_XTPR      (4*32+14) /* Send Task Priority Messages */
  #define X86_FEATURE_DCA               (4*32+18) /* Direct Cache Access */
+ #define X86_FEATURE_X2APIC    (4*32+21) /* x2APIC */
 +#define X86_FEATURE_XMM4_2    (4*32+20) /* Streaming SIMD Extensions-4.2 */
  
  /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */
  #define X86_FEATURE_XSTORE    (5*32+ 2) /* on-CPU RNG present (xstore insn) */
  #define cpu_has_gbpages               boot_cpu_has(X86_FEATURE_GBPAGES)
  #define cpu_has_arch_perfmon  boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
  #define cpu_has_pat           boot_cpu_has(X86_FEATURE_PAT)
+ #define cpu_has_x2apic                boot_cpu_has(X86_FEATURE_X2APIC)
 +#define cpu_has_xmm4_2                boot_cpu_has(X86_FEATURE_XMM4_2)
  
  #if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
  # define cpu_has_invlpg               1