drm/amdgpu: move mmhub ras_func init to ip specific file

mmhub ras is always owned by gpu driver. ras_funcs
initialization shall be done at ip level, instead of
putting it in common gmc interface file

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 013efc746821b1bc31285011f988376536161f1b..4d32233cde9210df4a17e2adb5caeb10fcf46a13 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -30,9 +30,6 @@
 #include "amdgpu_gmc.h"
 #include "amdgpu_ras.h"
 #include "amdgpu_xgmi.h"
-#include "mmhub_v1_0.h"
-#include "mmhub_v9_4.h"
-#include "mmhub_v1_7.h"
 
 /**
  * amdgpu_gmc_pdb0_alloc - allocate vram for pdb0
@@ -401,22 +398,6 @@ int amdgpu_gmc_ras_late_init(struct amdgpu_device *adev)
                        return r;
        }
 
-       /* initialize mmhub ras funcs */
-       switch (adev->asic_type) {
-       case CHIP_VEGA20:
-               adev->mmhub.ras_funcs = &mmhub_v1_0_ras_funcs;
-               break;
-       case CHIP_ARCTURUS:
-               adev->mmhub.ras_funcs = &mmhub_v9_4_ras_funcs;
-               break;
-       case CHIP_ALDEBARAN:
-               adev->mmhub.ras_funcs = &mmhub_v1_7_ras_funcs;
-               break;
-       default:
-               /* mmhub ras is not available */
-               break;
-       }
-
        if (adev->mmhub.ras_funcs &&
            adev->mmhub.ras_funcs->ras_late_init) {
                r = adev->mmhub.ras_funcs->ras_late_init(adev);

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index e1f9cc96e5676a21d2d8e8641b5723186063cff6..c82d82da2c7395cfb5b503925634574597ed1d17 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1186,6 +1186,24 @@ static void gmc_v9_0_set_mmhub_funcs(struct amdgpu_device *adev)
        }
 }
 
+static void gmc_v9_0_set_mmhub_ras_funcs(struct amdgpu_device *adev)
+{
+       switch (adev->asic_type) {
+       case CHIP_VEGA20:
+               adev->mmhub.ras_funcs = &mmhub_v1_0_ras_funcs;
+               break;
+       case CHIP_ARCTURUS:
+               adev->mmhub.ras_funcs = &mmhub_v9_4_ras_funcs;
+               break;
+       case CHIP_ALDEBARAN:
+               adev->mmhub.ras_funcs = &mmhub_v1_7_ras_funcs;
+               break;
+       default:
+               /* mmhub ras is not available */
+               break;
+       }
+}
+
 static void gmc_v9_0_set_gfxhub_funcs(struct amdgpu_device *adev)
 {
        adev->gfxhub.funcs = &gfxhub_v1_0_funcs;
@@ -1209,6 +1227,7 @@ static int gmc_v9_0_early_init(void *handle)
        gmc_v9_0_set_irq_funcs(adev);
        gmc_v9_0_set_umc_funcs(adev);
        gmc_v9_0_set_mmhub_funcs(adev);
+       gmc_v9_0_set_mmhub_ras_funcs(adev);
        gmc_v9_0_set_gfxhub_funcs(adev);
 
        adev->gmc.shared_aperture_start = 0x2000000000000000ULL;