]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
drm/amdgpu: Add smuio callback to get gpu clk counter
authorHawking Zhang <Hawking.Zhang@amd.com>
Sun, 17 Mar 2024 11:07:11 +0000 (19:07 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 20 Mar 2024 17:38:16 +0000 (13:38 -0400)
Add smuio callback to get gpu clk counter

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_smuio.h
drivers/gpu/drm/amd/amdgpu/smuio_v14_0_2.c

index ff44351810554012d6b1574eff8c6c95357a18f3..ec9d12f85f39f7f8269186a123b0aca817248e0b 100644 (file)
@@ -44,6 +44,7 @@ struct amdgpu_smuio_funcs {
        u32 (*get_socket_id)(struct amdgpu_device *adev);
        enum amdgpu_pkg_type (*get_pkg_type)(struct amdgpu_device *adev);
        bool (*is_host_gpu_xgmi_supported)(struct amdgpu_device *adev);
+       u64 (*get_gpu_clock_counter)(struct amdgpu_device *adev);
 };
 
 struct amdgpu_smuio {
index 7b7cca220b260b140e9d9fc0859d324ab1e96bb6..2a51a70d4846aad9b60b81502050944e3a9c04cb 100644 (file)
@@ -24,6 +24,7 @@
 #include "smuio_v14_0_2.h"
 #include "smuio/smuio_14_0_2_offset.h"
 #include "smuio/smuio_14_0_2_sh_mask.h"
+#include <linux/preempt.h>
 
 static u32 smuio_v14_0_2_get_rom_index_offset(struct amdgpu_device *adev)
 {
@@ -35,7 +36,27 @@ static u32 smuio_v14_0_2_get_rom_data_offset(struct amdgpu_device *adev)
        return SOC15_REG_OFFSET(SMUIO, 0, regROM_DATA);
 }
 
+static u64 smuio_v14_0_2_get_gpu_clock_counter(struct amdgpu_device *adev)
+{
+       u64 clock;
+       u64 clock_counter_lo, clock_counter_hi_pre, clock_counter_hi_after;
+
+       preempt_disable();
+       clock_counter_hi_pre = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_UPPER);
+       clock_counter_lo = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_LOWER);
+       /* the clock counter may be udpated during polling the counters */
+       clock_counter_hi_after = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_UPPER);
+       if (clock_counter_hi_pre != clock_counter_hi_after)
+               clock_counter_lo = (u64)RREG32_SOC15(SMUIO, 0, regGOLDEN_TSC_COUNT_LOWER);
+       preempt_enable();
+
+       clock = clock_counter_lo | (clock_counter_hi_after << 32ULL);
+
+       return clock;
+}
+
 const struct amdgpu_smuio_funcs smuio_v14_0_2_funcs = {
        .get_rom_index_offset = smuio_v14_0_2_get_rom_index_offset,
        .get_rom_data_offset = smuio_v14_0_2_get_rom_data_offset,
+       .get_gpu_clock_counter = smuio_v14_0_2_get_gpu_clock_counter,
 };