clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback
authorQuanyang Wang <quanyang.wang@windriver.com>
Tue, 6 Apr 2021 15:40:15 +0000 (23:40 +0800)
committerStephen Boyd <sboyd@kernel.org>
Thu, 8 Apr 2021 01:09:23 +0000 (18:09 -0700)
The round_rate callback should only perform rate calculation and not
involve calling zynqmp_pll_set_mode to change the pll mode. So let's
move zynqmp_pll_set_mode out of round_rate and to set_rate callback.

Fixes: 3fde0e16d016 ("drivers: clk: Add ZynqMP clock driver")
Reported-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Link: https://lore.kernel.org/r/20210406154015.602779-1-quanyang.wang@windriver.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/zynqmp/pll.c

index 92f449ed38e51a3765b1be5ebb7692e54dd58a1a..03bfe62c1e623073c4e1011a05b8681f2766976a 100644 (file)
@@ -100,9 +100,7 @@ static long zynqmp_pll_round_rate(struct clk_hw *hw, unsigned long rate,
        /* Enable the fractional mode if needed */
        rate_div = (rate * FRAC_DIV) / *prate;
        f = rate_div % FRAC_DIV;
-       zynqmp_pll_set_mode(hw, !!f);
-
-       if (zynqmp_pll_get_mode(hw) == PLL_MODE_FRAC) {
+       if (f) {
                if (rate > PS_PLL_VCO_MAX) {
                        fbdiv = rate / PS_PLL_VCO_MAX;
                        rate = rate / (fbdiv + 1);
@@ -173,10 +171,12 @@ static int zynqmp_pll_set_rate(struct clk_hw *hw, unsigned long rate,
        long rate_div, frac, m, f;
        int ret;
 
-       if (zynqmp_pll_get_mode(hw) == PLL_MODE_FRAC) {
-               rate_div = (rate * FRAC_DIV) / parent_rate;
+       rate_div = (rate * FRAC_DIV) / parent_rate;
+       f = rate_div % FRAC_DIV;
+       zynqmp_pll_set_mode(hw, !!f);
+
+       if (f) {
                m = rate_div / FRAC_DIV;
-               f = rate_div % FRAC_DIV;
                m = clamp_t(u32, m, (PLL_FBDIV_MIN), (PLL_FBDIV_MAX));
                rate = parent_rate * m;
                frac = (parent_rate * f) / FRAC_DIV;