#define SLI_PORT_CONTROL_IP_MASK       0x08000000
 
-#define PCICFG_CUST_SCRATCHPAD_CSR     0x1EC
-
 /********* Memory BAR register ************/
 #define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET     0xfc
 /* Host Interrupt Enable, if set interrupts are enabled although "PCI Interrupt
 
        u16 offset, stride;
 
        pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
+       if (!pos)
+               return 0;
        pci_read_config_word(pdev, pos + PCI_SRIOV_VF_OFFSET, &offset);
        pci_read_config_word(pdev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 
        be_cmd_fw_clean(adapter);
 
        be_msix_disable(adapter);
-       pci_write_config_dword(adapter->pdev, PCICFG_CUST_SCRATCHPAD_CSR, 0);
        return 0;
 }
 
 
        schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
        adapter->flags |= BE_FLAGS_WORKER_SCHEDULED;
-
-       pci_write_config_dword(adapter->pdev, PCICFG_CUST_SCRATCHPAD_CSR, 1);
        return 0;
 err:
        be_clear(adapter);
 
 static bool be_reset_required(struct be_adapter *adapter)
 {
-       u32 reg;
-
-       pci_read_config_dword(adapter->pdev, PCICFG_CUST_SCRATCHPAD_CSR, ®);
-       return reg;
+       return be_find_vfs(adapter, ENABLED) > 0 ? false : true;
 }
 
 static int __devinit be_probe(struct pci_dev *pdev,