Merge tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu into staging

*: Delete checks for old host definitions
tcg/loongarch64: Generate LSX instructions
fpu: Add conversions between bfloat16 and [u]int8
fpu: Handle m68k extended precision denormals properly
accel/tcg: Improve cputlb i/o organization
accel/tcg: Simplify tlb_plugin_lookup
accel/tcg: Remove false-negative halted assertion
tcg: Add gvec compare with immediate and scalar operand
tcg/aarch64: Emit BTI insns at jump landing pads

[Resolved conflict between CPUINFO_PMULL and CPUINFO_BTI.
--Stefan]

* tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu: (39 commits)
  tcg: Map code_gen_buffer with PROT_BTI
  tcg/aarch64: Emit BTI insns at jump landing pads
  util/cpuinfo-aarch64: Add CPUINFO_BTI
  tcg: Add tcg_out_tb_start backend hook
  fpu: Handle m68k extended precision denormals properly
  fpu: Add conversions between bfloat16 and [u]int8
  accel/tcg: Introduce do_st16_mmio_leN
  accel/tcg: Introduce do_ld16_mmio_beN
  accel/tcg: Merge io_writex into do_st_mmio_leN
  accel/tcg: Merge io_readx into do_ld_mmio_beN
  accel/tcg: Replace direct use of io_readx/io_writex in do_{ld,st}_1
  accel/tcg: Merge cpu_transaction_failed into io_failed
  plugin: Simplify struct qemu_plugin_hwaddr
  accel/tcg: Use CPUTLBEntryFull.phys_addr in io_failed
  accel/tcg: Split out io_prepare and io_failed
  accel/tcg: Simplify tlb_plugin_lookup
  target/arm: Use tcg_gen_gvec_cmpi for compare vs 0
  tcg: Add gvec compare with immediate and scalar operand
  tcg/loongarch64: Implement 128-bit load & store
  tcg/loongarch64: Lower rotli_vec to vrotri
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

diff --cc host/include/aarch64/host/cpuinfo.h
index fe8c3b3fd17a07f80b7a7a822fcef3cd30e89cd6,a59c8418d265a9b2dbe162a1c0f30767eea83a28..fe671534e40fa0198a42a08e69af4c6054f09be3
--- 1/host/include/aarch64/host/cpuinfo.h
--- 2/host/include/aarch64/host/cpuinfo.h
+++ b/host/include/aarch64/host/cpuinfo.h
@@@ -10,7 -10,7 +10,8 @@@
  #define CPUINFO_LSE             (1u << 1)
  #define CPUINFO_LSE2            (1u << 2)
  #define CPUINFO_AES             (1u << 3)
 -#define CPUINFO_BTI             (1u << 4)
 +#define CPUINFO_PMULL           (1u << 4)
++#define CPUINFO_BTI             (1u << 5)
  
  /* Initialized with a constructor. */
  extern unsigned cpuinfo;

diff --cc util/cpuinfo-aarch64.c
index e0e1fe6071408da5fc9630cc5ad11346c1b75fcd,e11b76491c003516030306fea1fc64fc161cdbfd..4c8a0057150876b3af28b1a5b2c3e51c18363c0e
--- 1/util/cpuinfo-aarch64.c
--- 2/util/cpuinfo-aarch64.c
+++ b/util/cpuinfo-aarch64.c
@@@ -56,14 -59,16 +59,18 @@@ unsigned __attribute__((constructor)) c
      unsigned long hwcap = qemu_getauxval(AT_HWCAP);
      info |= (hwcap & HWCAP_ATOMICS ? CPUINFO_LSE : 0);
      info |= (hwcap & HWCAP_USCAT ? CPUINFO_LSE2 : 0);
 -    info |= (hwcap & HWCAP_AES ? CPUINFO_AES: 0);
 +    info |= (hwcap & HWCAP_AES ? CPUINFO_AES : 0);
 +    info |= (hwcap & HWCAP_PMULL ? CPUINFO_PMULL : 0);
+ 
+     unsigned long hwcap2 = qemu_getauxval(AT_HWCAP2);
+     info |= (hwcap2 & HWCAP2_BTI ? CPUINFO_BTI : 0);
  #endif
  #ifdef CONFIG_DARWIN
      info |= sysctl_for_bool("hw.optional.arm.FEAT_LSE") * CPUINFO_LSE;
      info |= sysctl_for_bool("hw.optional.arm.FEAT_LSE2") * CPUINFO_LSE2;
      info |= sysctl_for_bool("hw.optional.arm.FEAT_AES") * CPUINFO_AES;
 +    info |= sysctl_for_bool("hw.optional.arm.FEAT_PMULL") * CPUINFO_PMULL;
+     info |= sysctl_for_bool("hw.optional.arm.FEAT_BTI") * CPUINFO_BTI;
  #endif
  
      cpuinfo = info;