* "last user address" is set even if bootp is used without parameters
(and it uses default address).
+======================================================================
+Modifications since 0.7.3:
+======================================================================
+
+* Add timeout handling to I2C code
+
+* Allow to overwrite CROSS_COMPILE setting when running MAKEALL
+ script
+
+* Fixes ins rdsproto configuration
+
+* Add missing '\n" in help messages
+
+* Remove PCMCIA code from sixnet configuration (has no PCMCIA)
+
+* Update bd info struct after baudrate changes
+
+* Added "ramboot" and "nfsboot" environment variables for easy
+ switching between ramdisk and nfsroot configurations
+
+* updated ETX_096 configuration
+
======================================================================
Modifications for 0.7.3:
======================================================================
#!/bin/sh
+if [ "${CROSS_COMPILE}" ] ; then
+ MAKE="make CROSS_COMPILE=${CROSS_COMPILE}"
+else
+ MAKE=make
+fi
+
[ -d LOG ] || mkdir LOG || exit 1
LIST=" \
for target in $@
do
- make distclean >/dev/null
- make ${target}_config
- make all 2>&1 >LOG/$target.MAKELOG | tee LOG/$target.ERR
- powerpc-linux-size ppcboot | tee -a LOG/$target.MAKELOG
+ ${MAKE} distclean >/dev/null
+ ${MAKE} ${target}_config
+ ${MAKE} all 2>&1 >LOG/$target.MAKELOG | tee LOG/$target.ERR
+ ${CROSS_COMPILE:-powerpc-linux-}size ppcboot | tee -a LOG/$target.MAKELOG
done
# MBX8xx boards
#
-//TEXT_BASE = 0xfff00000
-TEXT_BASE = 0x00200000
+TEXT_BASE = 0xfff00000
+//TEXT_BASE = 0x00200000
unsigned int tm_year;
};
-const char bcd_table[2][8]={ { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 },
- { 1, 2, 4, 8, 10, 20, 40, 80 }};
-
-unsigned char bcd2bin(unsigned char bcd_value)
-{
- unsigned char n,bin_value=0;
-
- for(n=0; n < 8 ; n++)
- {
- if(bcd_value & bcd_table[0][n])
- bin_value += bcd_table[1][n];
- }
- return bin_value;
-}
-
-unsigned char bin2bcd(unsigned char bin_value)
-{
- unsigned char n,bcd_value;
-
- bcd_value = 0;
-
- for(n = 7; n != 255 ; n--)
- {
- if(bin_value / bcd_table[1][n])
- {
- bcd_value += bcd_table[0][n];
- bin_value -= bcd_table[1][n];
- }
- }
- return bcd_value;
-}
-
void read_RS5C372_time(struct tm *timedate)
{
i2c_state_t i2c_state;
unsigned char buffer[8];
int rc;
- int n;
+# define BCD_TO_BIN(val) ((val)=((val)&15) + ((val)>>4)*10)
i2c_newio(&i2c_state);
I2CF_ENABLE_SECONDARY | I2CF_START_COND,
0, /* size */
NULL); /* data */
- if (rc)
- panic("i2c error %02x\n", rc);
+ if (rc)
+ goto i2c_error;
/* schedule the read command with repeated start condition */
rc = i2c_receive(&i2c_state,
sizeof(buffer), /* size to expect */
buffer); /* data */
if (rc)
- panic("i2c error %02x\n", rc);
+ goto i2c_error;
/* perform io operations */
rc = i2c_doio(&i2c_state);
if (rc)
- panic("i2c error %02x\n", rc);
-
- for(n=0; n<7; n++)
- buffer[n] = bcd2bin(buffer[n]);
-
- timedate->tm_sec = buffer[0];
- timedate->tm_min = buffer[1];
- timedate->tm_hour = buffer[2];
- timedate->tm_wday = buffer[3];
- timedate->tm_mday = buffer[4];
- timedate->tm_mon = buffer[5];
- timedate->tm_year = buffer[6] + 2000;
+ goto i2c_error;
+
+ timedate->tm_sec = BCD_TO_BIN(buffer[0]);
+ timedate->tm_min = BCD_TO_BIN(buffer[1]);
+ timedate->tm_hour = BCD_TO_BIN(buffer[2]);
+ timedate->tm_wday = BCD_TO_BIN(buffer[3]);
+ timedate->tm_mday = BCD_TO_BIN(buffer[4]);
+ timedate->tm_mon = BCD_TO_BIN(buffer[5]);
+ timedate->tm_year = BCD_TO_BIN(buffer[6]) + 2000;
+ return;
+
+i2c_error:
+ /*printf("i2c error %02x\n", rc);*/
+ memset(timedate, 0, sizeof(struct tm));
+ return;
}
/* ------------------------------------------------------------------------- */
-unsigned char read_LM84_temp(int address)
+int read_LM84_temp(int address)
{
i2c_state_t i2c_state;
unsigned char buffer[8];
0, /* size */
NULL); /* data */
if (rc)
- panic("i2c error %02x\n", rc);
+ goto i2c_error;
/* perform io operations */
rc = i2c_doio(&i2c_state);
if (rc)
- panic("i2c error %02x\n", rc);
+ goto i2c_error;
/* begin new i2c packet */
i2c_newio(&i2c_state);
1, /* size to expect */
buffer); /* data */
if (rc)
- panic("i2c error %02x\n", rc);
+ goto i2c_error;
/* perform io operations */
rc = i2c_doio(&i2c_state);
if (rc)
- panic("i2c error %02x\n", rc);
+ goto i2c_error;
+
+ return (int)buffer[0];
- return buffer[0];
+i2c_error:
+ /*printf("i2c error %02x\n", rc);*/
+ return -42;
}
/* ------------------------------------------------------------------------- */
int checkboard(void)
{
struct tm timedate;
- unsigned char ppctemp, prottemp;
+ unsigned int ppctemp, prottemp;
printf ("Rohde & Schwarz 8260 Protocol Board\n");
printf(" Time: %02d:%02d:%02d\n", timedate.tm_hour, timedate.tm_min, timedate.tm_sec);
printf(" Date: %02d-%02d-%04d\n", timedate.tm_mday, timedate.tm_mon, timedate.tm_year);
ppctemp = read_LM84_temp(LM84_PPC_I2C_ADR);
-#if 0
- /* can't read the LM84_SHARC_I2C_ADR ?! */
prottemp = read_LM84_temp(LM84_SHARC_I2C_ADR);
-#else
- prottemp = 0;
-#endif
printf(" Temp: PPC %d C, Protocol Board %d C\n",
ppctemp, prottemp);
/* ------------------------------------------------------------------------- */
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
-
-#ifdef CFG_PCMCIA_MEM_ADDR
-volatile unsigned char *pcmcia_mem = (unsigned char*)CFG_PCMCIA_MEM_ADDR;
-#endif
-
-int pcmcia_init(void)
-{
- volatile pcmconf8xx_t *pcmp;
- uint v, slota, slotb;
-
- /*
- ** Enable the PCMCIA for a Flash card.
- */
- pcmp = (pcmconf8xx_t *)(&(((immap_t *)CFG_IMMR)->im_pcmcia));
-
- /* Set all slots to zero by default. */
- pcmp->pcmc_pgcra = 0;
- pcmp->pcmc_pgcrb = 0;
-#ifdef PCMCIA_SLOT_A
- pcmp->pcmc_pgcra = 0x40;
-#endif
-#ifdef PCMCIA_SLOT_B
- pcmp->pcmc_pgcrb = 0x40;
-#endif
-
- /* enable PCMCIA buffers */
- *((uint *)BCSR1) &= ~BCSR1_PCCEN;
-
- /* Check if any PCMCIA card is plugged in. */
-
- slota = (pcmp->pcmc_pipr & 0x18000000) == 0 ;
- slotb = (pcmp->pcmc_pipr & 0x00001800) == 0 ;
-
- if (!(slota || slotb))
- {
- printf("No card present\n");
-#ifdef PCMCIA_SLOT_A
- pcmp->pcmc_pgcra = 0;
-#endif
-#ifdef PCMCIA_SLOT_B
- pcmp->pcmc_pgcrb = 0;
-#endif
- return -1;
- }
- else
- printf("Card present (");
-
- v = 0;
-
- /* both the ADS and the FADS have a 5V keyed pcmcia connector (?)
- **
- ** Paolo - Yes, but i have to insert some 3.3V card in that slot on
- ** my FADS... :-)
- */
-
-#if defined(CONFIG_MPC860) || defined(CONFIG_MPC855)
- switch( (pcmp->pcmc_pipr >> 30) & 3 )
-#else
-#error unknown processor type
-#endif
- {
- case 0x00 :
- printf("5V");
- v = 5;
- break;
- case 0x01 :
- printf("5V and 3V");
- v = 3; // User lower voltage if supported!
- break;
- case 0x03 :
- printf("5V, 3V and x.xV");
- v = 3; // User lower voltage if supported!
- break;
- }
-
- switch(v){
- case 3:
- printf("; using 3V");
- /*
- ** Enable 3 volt Vcc.
- */
- *((uint *)BCSR1) &= ~BCSR1_PCCVCC1;
- *((uint *)BCSR1) |= BCSR1_PCCVCC0;
- break;
- case 5:
- printf("; using 5V");
- /*
- ** Enable 5 volt Vcc.
- */
- *((uint *)BCSR1) &= ~BCSR1_PCCVCC0;
- *((uint *)BCSR1) |= BCSR1_PCCVCC1;
- break;
-
- default:
- *((uint *)BCSR1) |= BCSR1_PCCEN; /* disable pcmcia */
-
- printf("; unknown voltage");
- return -1;
- }
- printf(")\n");
- /* disable pcmcia reset after a while */
-
- udelay(20);
-
-#if defined(CONFIG_MPC860) || defined(CONFIG_MPC855)
- pcmp->pcmc_pgcra = 0;
-#else
-#error unknown processor type
-#endif
-
- /* If you using a real hd you should give a short
- * spin-up time. */
-#ifdef CONFIG_DISK_SPINUP_TIME
- udelay(CONFIG_DISK_SPINUP_TIME);
-#endif
-
- return 0;
-}
-
+#error "SXNI855T has no PCMCIA port"
#endif /* CFG_CMD_PCMCIA */
/* ------------------------------------------------------------------------- */
*((uint *) BCSR4) &= ~CFG_BCSR4_CLEAR;
*((uint *) BCSR4) |= CFG_BCSR4_SET;
-#if defined(FEC_ENET)
+#if defined(CONFIG_FEC_ENET)
/* configure FADS for fast (FEC) ethernet, half-duplex */
/* The LXT970 needs about 50ms to recover from reset, so
* wait for it by discovering the PHY before leaving eth_init().
if (getc() == '\r')
break;
}
+ bd->bi_baudrate = baudrate;
}
if (*++nxt == '\0') {
/*
* Make sure there is a card in the slot, then configure the interface.
*/
+ udelay(10000);
PCMCIA_DEBUG ("[%d] %s: PIPR(%p)=0x%x\n",
__LINE__,__FUNCTION__,
- &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);udelay(10000);
+ &(pcmp->pcmc_pipr),pcmp->pcmc_pipr);
if (pcmp->pcmc_pipr & 0x00001800) {
printf (" No Card found\n");
return (1);
/* Configure PCMCIA General Control Register */
PCMCIA_PGCRX(_slot_) = 0;
- /*
- * Disable PCMCIA buffers (isolate the interface)
- */
- PCMCIA_DEBUG ("Disable PCMCIA buffers\n");
- PCMCIA_PGCRX(_slot_) &= ~__MY_PCMCIA_GCRX_CXOE;
- udelay(500);
-
PCMCIA_DEBUG ("Disable PCMCIA buffers and assert RESET\n");
reg = PCMCIA_PGCRX(_slot_);
- reg &= ~__MY_PCMCIA_GCRX_CXRESET; /* active high */
- reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
+ reg |= __MY_PCMCIA_GCRX_CXRESET; /* active high */
+ reg |= __MY_PCMCIA_GCRX_CXOE; /* active low */
PCMCIA_PGCRX(_slot_) = reg;
return (0);
environment:
.globl env_crc
env_crc:
-#ifdef ENV_CRC // If we are building with computed CRC...
- .long ENV_CRC // ...use it!
+#ifdef ENV_CRC /* If we are building with computed CRC... */
+ .long ENV_CRC /* ...use it! */
#else
.long ~0
#endif
.ascii CONFIG_BOOTCOMMAND
.ascii "\0"
#endif
+#ifdef CONFIG_RAMBOOTCOMMAND
+ .ascii "ramboot="
+ .ascii CONFIG_RAMBOOTCOMMAND
+ .ascii "\0"
+#endif
+#ifdef CONFIG_NFSBOOTCOMMAND
+ .ascii "nfsboot="
+ .ascii CONFIG_NFSBOOTCOMMAN
+ .ascii D "\0"
+#endif
#if (CONFIG_BOOTDELAY >= 0)
.ascii "bootdelay="
.ascii MK_STR(CONFIG_BOOTDELAY)
/* us to wait before checking the i2c */
#define DELAY_US 100000
+/* tx/rx timeout (we need the i2c early, so we don't use get_timer()) */
+#define TOUT_LOOP 1000000
+
#define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
#define NUM_RX_BDS 4
#define NUM_TX_BDS 4
volatile iic_t *iip;
volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c;
volatile I2C_BD *txbd, *rxbd;
+ volatile int j = 0;
PRINTD(("[I2C] i2c_doio\n"));
/* Loop until transmit & receive completed */
PRINTD(("[I2C] Transmitting...\n"));
- while(txbd->status & BD_SC_READY)
- __asm__ __volatile__ ("eieio");
+ while((txbd->status & BD_SC_READY) && (j < TOUT_LOOP))
+ j++;
+
+ if (j < TOUT_LOOP)
+ {
+ PRINTD(("[I2C] Receiving...\n"));
+ while((rxbd->status & BD_SC_EMPTY) && (j < TOUT_LOOP))
+ j++;
+ }
- PRINTD(("[I2C] Receiving...\n"));
- while(rxbd->status & BD_SC_EMPTY)
- __asm__ __volatile__ ("eieio");
-
/* Turn off I2C */
i2c->i2c_i2mod &= ~0x01;
-
- return 0;
+
+ return (j >= TOUT_LOOP) ? I2CERR_TIMEOUT : 0;
}
#define CMD_TBL_EEPROM MK_CMD_TBL_ENTRY( \
"eeprom", 3, 5, 1, do_eeprom, \
- "eeprom - EEPROM sub-system", \
+ "eeprom - EEPROM sub-system\n", \
"read addr off cnt\n" \
"eeprom write addr off cnt\n" \
" - read/write `cnt' bytes at EEPROM offset `off'\n" \
#undef CONFIG_8xx_CONS_SMC1
#define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */
#undef CONFIG_8xx_CONS_NONE
-#define CONFIG_BAUDRATE 115200
+#define CONFIG_BAUDRATE 57600
#if 0
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
#else
#endif
#undef CONFIG_BOOTARGS
-#define CONFIG_BOOTCOMMAND \
+#define CONFIG_RAMBOOTCOMMAND \
"bootp; " \
- "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \
+ "setenv bootargs root=/dev/ram rw ramdisk_size=4690 " \
"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off; " \
"bootm"
+#define CONFIG_NFSBOOTCOMMAND \
+ "bootp; " \
+ "setenv bootargs root=/dev/nfs rw nfsroot=$(nfsip):$(rootpath) " \
+ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off; " \
+ "bootm"
+#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
/*
* ### FIXME - these are still from config_FADS860T.h
- * ff020000 -> ff02ffff : pcmcia
* ff010000 -> ff01ffff : BCSR connected to CS1, setup by 8xxrom
* ff000000 -> ff00ffff : IMAP internal in the cpu
* fe000000 -> ffnnnnnn : flash connected to CS0, setup by 8xxrom
*/
#include <mpc8xx_irq.h>
+#define CONFIG_SXNI855T 1 /* SIXNET IPm 855T CPU module */
+
/* The 855T is just a stripped 860T and needs code for 860, so for now
* at least define 860, 860T and 855T
*/
#define CONFIG_BAUDRATE 9600
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
-#define MPC8XX_FACT 12 /* Multiply by 12 */
-#define MPC8XX_XIN 4000000 /* 4 MHz in */
-#define MPC8XX_HZ ((MPC8XX_XIN) * (MPC8XX_FACT))
+#define MPC8XX_FACT 10 /* 50 MHz is 5 MHz in times 10 */
-#if 1
+#if 0
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
#else
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#endif
-#define CONFIG_BOOTCOMMAND "bootm 2800100" /* autoboot command */
-#define CONFIG_BOOTARGS ""
+#define CONFIG_BOOTCOMMAND "bootm 02880000 02900000" /* autoboot command */
+#define CONFIG_BOOTARGS "root=/dev/ram ip=10.1.0.147:::255.128.0.0:fads::off"
#undef CONFIG_WATCHDOG /* watchdog disabled */
-/* choose SCC1 ethernet (10BASET on motherboard)
- * or FEC ethernet (10/100 on daughterboard)
- */
-#if 1
-#define CONFIG_SCC1_ENET 1 /* use SCC1 ethernet */
-#undef CONFIG_FEC_ENET /* disable FEC ethernet */
-#else
-#undef CONFIG_SCC1_ENET /* disable SCC1 ethernet */
#define CONFIG_FEC_ENET 1 /* use FEC ethernet */
-#define CFG_DISCOVER_PHY
-#endif
+#undef CONFIG_SCC1_ENET /* disable SCC1 ethernet */
#if defined(CONFIG_SCC1_ENET) && defined(CONFIG_FEC_ENET)
#error Both CONFIG_SCC1_ENET and CONFIG_FEC_ENET configured
#endif
+#define CFG_DISCOVER_PHY
#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_EEPROM)
/*
* Miscellaneous configurable options
*/
-#undef CFG_LONGHELP /* undef to save memory */
+#define CFG_LONGHELP /* undef to save a little memory */
#define CFG_PROMPT "=>" /* Monitor Command Prompt */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
*/
#define CFG_SDRAM_BASE 0x00000000
-#define CFG_FLASH_BASE 0x2800000
+#define CFG_FLASH_BASE 0x02800000
#define CFG_FLASH_SIZE ((uint)(8 * 1024 * 1024)) /* max 8Mbyte */
-#define CFG_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CFG_MONITOR_BASE CFG_FLASH_BASE
#define CFG_HWINFO_LEN 0x0040 /* Length of HW Info Data */
-#define CFG_MALLOC_LEN (384 << 10) /* Reserve 384 kB for malloc() */
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
#if 0
#define CFG_HWINFO_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN - CFG_HWINFO_LEN)
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
-#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_OFFSET 0x00040000
-#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
-#define CFG_ENV_SECT_SIZE 0x40000 /* see README - env sect real size */
-
/*-----------------------------------------------------------------------
* Cache Configuration
*/
*/
/* the other CS:s are determined by looking at parameters in BCSRx */
-#define BCSR_ADDR ((uint) 0xFF01000)
+#define BCSR_ADDR ((uint) 0xFF010000)
#define BCSR_SIZE ((uint)(64 * 1024))
-#define FLASH_BASE0_PRELIM 0x2800000 /* FLASH bank #0 */
-#define FLASH_BASE1_PRELIM 0x0 /* FLASH bank #1 */
+#define FLASH_BASE0_PRELIM 0x02800000 /* FLASH bank #0 */
+#define FLASH_BASE1_PRELIM 0x00000000 /* FLASH bank #1 not used */
#define CFG_REMAP_OR_AM 0x80000000 /* OR addr mask */
#define CFG_PRELIM_OR_AM 0xFFE00000 /* OR addr mask */
#define CFG_OR0_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH)
-#ifdef USE_REAL_FLASH_VALUES
-/*
- * These values fit our FADS860T ...
- * The "default" behaviour with 1Mbyte initial doesn't work for us!
- */
-#define CFG_OR0_PRELIM 0x0FFC00D34 /* Real values for the board */
-#define CFG_BR0_PRELIM 0x02800001 /* Real values for the board */
-#else
-#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) /* 1 Mbyte until detected and only 1 Mbyte is needed*/
+#define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)
#define CFG_BR0_PRELIM ((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_V )
-#endif
/* BCSRx - Board Control and Status Registers */
#define CFG_OR1_REMAP CFG_OR0_REMAP
/* values according to the manual */
-
-#define PCMCIA_MEM_ADDR ((uint)0xff020000)
-#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
-
#define BCSR0 ((uint) (BCSR_ADDR + 00))
#define BCSR1 ((uint) (BCSR_ADDR + 0x04))
#define BCSR2 ((uint) (BCSR_ADDR + 0x08))
#define BCSR4_TFPLDL ((uint)0x40000000)
#define BCSR4_TPSQEL ((uint)0x20000000)
#define BCSR4_SIGNAL_LAMP ((uint)0x10000000)
-#ifdef CONFIG_MPC823
-#define BCSR4_USB_EN ((uint)0x08000000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC860SAR
-#define BCSR4_UTOPIA_EN ((uint)0x08000000)
-#endif /* CONFIG_MPC860SAR */
+
#ifdef CONFIG_MPC860T
#define BCSR4_FETH_EN ((uint)0x08000000)
-#endif /* CONFIG_MPC860T */
-#ifdef CONFIG_MPC823
-#define BCSR4_USB_SPEED ((uint)0x04000000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC860T
#define BCSR4_FETHCFG0 ((uint)0x04000000)
-#endif /* CONFIG_MPC860T */
-#ifdef CONFIG_MPC823
-#define BCSR4_VCCO ((uint)0x02000000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC860T
#define BCSR4_FETHFDE ((uint)0x02000000)
-#endif /* CONFIG_MPC860T */
-#ifdef CONFIG_MPC823
-#define BCSR4_VIDEO_ON ((uint)0x00800000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC823
-#define BCSR4_VDO_EKT_CLK_EN ((uint)0x00400000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC860T
#define BCSR4_FETHCFG1 ((uint)0x00400000)
-#endif /* CONFIG_MPC860T */
-#ifdef CONFIG_MPC823
-#define BCSR4_VIDEO_RST ((uint)0x00200000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC860T
#define BCSR4_FETHRST ((uint)0x00200000)
#endif /* CONFIG_MPC860T */
-#ifdef CONFIG_MPC823
-#define BCSR4_MODEM_EN ((uint)0x00100000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC823
-#define BCSR4_DATA_VOICE ((uint)0x00080000)
-#endif /* CONFIG_MPC823 */
-#ifdef CONFIG_MPC850
-#define BCSR4_DATA_VOICE ((uint)0x00080000)
-#endif /* CONFIG_MPC50 */
#define CONFIG_DRAM_50MHZ 1
#define CONFIG_SDRAM_50MHZ
#define CONFIG_DISK_SPINUP_TIME 1000000
-
-/* PCMCIA configuration */
-
-#define PCMCIA_MAX_SLOTS 2
-
-#ifdef CONFIG_MPC860
-#define PCMCIA_SLOT_A 1
-#endif
-
-#define CFG_BOARD_CONFIG 1
-
#define CFG_BCSR1_SET 0 /* no bits to set to 1 */
/* NOTE - These are low to enable (but we use the names in the FADS manual) */
+#ifdef CFG_SCC1_ENET
#define CFG_BCSR1_CLEAR (BCSR1_RS232EN_1 | BCSR1_RS232EN_2 | BCSR1_ETHEN)
+#else
+#define CFG_BCSR1_CLEAR (BCSR1_RS232EN_1 | BCSR1_RS232EN_2)
+#endif
-#ifdef CONFIG_SCC1_ENET
-#define CFG_BCSR4_SET (BCSR4_TFPLDL | BCSR4_TPSQEL)
-#define CFG_BCSR4_CLEAR (BCSR4_ETHLOOP)
-#elif defined(CONFIG_FEC_ENET)
+#if defined(CONFIG_FEC_ENET)
#define CFG_BCSR4_SET (BCSR4_FETHCFG0 | BCSR4_FETHFDE | BCSR4_FETHRST)
#define CFG_BCSR4_CLEAR (BCSR4_FETH_EN | BCSR4_FETHCFG1)
#endif
-#undef CONFIG_BOOTDELAY
-#undef CONFIG_BOOTCOMMAND
-#undef CONFIG_BOOTARGS
-
-#define CFG_LONGHELP /* undef to save a little memory */
-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
-#define CONFIG_BOOTCOMMAND "bootm 2880000 2900000" /* autoboot command */
-#define CONFIG_BOOTARGS "root=/dev/ram ip=10.1.0.147:::255.128.0.0:fads::off"
-
-#undef CONFIG_SCC1_ENET /* disable SCC1 ethernet */
-#define CONFIG_FEC_ENET 1 /* use FEC ethernet */
-#define CFG_DISCOVER_PHY
-
-#if 1
-// overrides to put environment in EEROM
-#undef CFG_ENV_IS_IN_FLASH
-#undef CFG_ENV_OFFSET
-#undef CFG_ENV_SIZE
-#undef CFG_ENV_SECT_SIZE
+#define CONFIG_RESET_ON_PANIC /* reset if system panic() */
+// to put environment in EEROM
#define CFG_ENV_IS_IN_EEPROM 1
#define CFG_ENV_OFFSET 0 /* Start right at beginning of NVRAM */
#define CFG_ENV_SIZE 512 /* Use only a part of it*/
/* Atmel 24C64 has 32-byte page write mode using last 5 bits of the address */
#define CFG_EEPROM_PAGE_WRITE_BITS 5
-#define CONFIG_SXNI855T 1 /* SIXNET IPm 855T CPU module */
+#if 0
+#define CONFIG_BOOT_RETRY_TIME 120 /* boot if no command in 120 seconds */
#endif
#endif /* __CONFIG_H */
/* return codes */
#define I2CERR_NO_BUFFERS 0x01 /* no more bds or buffer space */
#define I2CERR_MSG_TOO_LONG 0x02 /* tried to send/receive to much data */
+#define I2CERR_TIMEOUT 0x03 /* timeout in i2c_doio() */
#else /* !CONFIG_MPC8260 */
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