#define VNDMR2_VPS             (1 << 30)
 #define VNDMR2_HPS             (1 << 29)
 #define VNDMR2_FTEV            (1 << 17)
-#define VNDMR2_FTEH            (1 << 16)
 #define VNDMR2_VLV(n)          ((n & 0xf) << 12)
-#define VNDMR2_HLV(n)          ((n) & 0xfff)
 
 /* Video n CSI2 Interface Mode Register (Gen3) */
 #define VNCSI_IFMD_DES1                (1 << 26)
 
 static int rvin_setup(struct rvin_dev *vin)
 {
-       u32 vnmc, dmr, dmr2, interrupts, lines;
+       u32 vnmc, dmr, dmr2, interrupts;
        bool progressive = false, output_is_yuv = false, input_is_yuv = false;
-       bool halfsize = false;
 
        switch (vin->format.field) {
        case V4L2_FIELD_TOP:
                /* Use BT if video standard can be read and is 60 Hz format */
                if (!vin->info->use_mc && vin->std & V4L2_STD_525_60)
                        vnmc = VNMC_IM_FULL | VNMC_FOC;
-               halfsize = true;
                break;
        case V4L2_FIELD_INTERLACED_TB:
                vnmc = VNMC_IM_FULL;
-               halfsize = true;
                break;
        case V4L2_FIELD_INTERLACED_BT:
                vnmc = VNMC_IM_FULL | VNMC_FOC;
-               halfsize = true;
                break;
        case V4L2_FIELD_NONE:
                vnmc = VNMC_IM_ODD_EVEN;
                break;
        }
 
-       if (vin->info->model == RCAR_GEN3) {
-               /* Enable HSYNC Field Toggle mode after height HSYNC inputs. */
-               lines = vin->format.height / (halfsize ? 2 : 1);
-               dmr2 = VNDMR2_FTEH | VNDMR2_HLV(lines);
-               vin_dbg(vin, "Field Toogle after %u lines\n", lines);
-       } else {
-               /* Enable VSYNC Field Toogle mode after one VSYNC input. */
+       /* Enable VSYNC Field Toogle mode after one VSYNC input */
+       if (vin->info->model == RCAR_GEN3)
+               dmr2 = VNDMR2_FTEV;
+       else
                dmr2 = VNDMR2_FTEV | VNDMR2_VLV(1);
-       }
 
        /* Hsync Signal Polarity Select */
        if (!(vin->mbus_cfg.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW))