union ionic_dev_cmd cmd = {
                .vf_setattr.opcode = IONIC_CMD_VF_SETATTR,
                .vf_setattr.attr = attr,
-               .vf_setattr.vf_index = vf,
+               .vf_setattr.vf_index = cpu_to_le16(vf),
        };
        int err;
 
 {
        union ionic_dev_cmd cmd = {
                .q_identify.opcode = IONIC_CMD_Q_IDENTIFY,
-               .q_identify.lif_type = lif_type,
+               .q_identify.lif_type = cpu_to_le16(lif_type),
                .q_identify.type = qtype,
                .q_identify.ver = qver,
        };
 
        int res_index;
 };
 
+#ifndef __CHECKER__
 /* Registers */
 static_assert(sizeof(struct ionic_intr) == 32);
 
 static_assert(sizeof(struct ionic_vf_setattr_comp) == 16);
 static_assert(sizeof(struct ionic_vf_getattr_cmd) == 64);
 static_assert(sizeof(struct ionic_vf_getattr_comp) == 16);
+#endif /* __CHECKER__ */
 
 struct ionic_devinfo {
        u8 asic_type;
 
 {
        union ionic_dev_cmd cmd = {
                .fw_download.opcode = IONIC_CMD_FW_DOWNLOAD,
-               .fw_download.offset = offset,
-               .fw_download.addr = addr,
-               .fw_download.length = length
+               .fw_download.offset = cpu_to_le32(offset),
+               .fw_download.addr = cpu_to_le64(addr),
+               .fw_download.length = cpu_to_le32(length),
        };
 
        ionic_dev_cmd_go(idev, &cmd);
 
                ret = -EINVAL;
        } else {
                ivf->vf           = vf;
-               ivf->vlan         = ionic->vfs[vf].vlanid;
+               ivf->vlan         = le16_to_cpu(ionic->vfs[vf].vlanid);
                ivf->qos          = 0;
                ivf->spoofchk     = ionic->vfs[vf].spoofchk;
                ivf->linkstate    = ionic->vfs[vf].linkstate;
-               ivf->max_tx_rate  = ionic->vfs[vf].maxrate;
+               ivf->max_tx_rate  = le32_to_cpu(ionic->vfs[vf].maxrate);
                ivf->trusted      = ionic->vfs[vf].trusted;
                ether_addr_copy(ivf->mac, ionic->vfs[vf].macaddr);
        }
                ret = ionic_set_vf_config(ionic, vf,
                                          IONIC_VF_ATTR_VLAN, (u8 *)&vlan);
                if (!ret)
-                       ionic->vfs[vf].vlanid = vlan;
+                       ionic->vfs[vf].vlanid = cpu_to_le16(vlan);
        }
 
        up_write(&ionic->vf_op_lock);
                ret = ionic_set_vf_config(ionic, vf,
                                          IONIC_VF_ATTR_RATE, (u8 *)&tx_max);
                if (!ret)
-                       lif->ionic->vfs[vf].maxrate = tx_max;
+                       lif->ionic->vfs[vf].maxrate = cpu_to_le32(tx_max);
        }
 
        up_write(&ionic->vf_op_lock);
 
 static void ionic_lif_queue_identify(struct ionic_lif *lif)
 {
+       union ionic_q_identity __iomem *q_ident;
        struct ionic *ionic = lif->ionic;
-       union ionic_q_identity *q_ident;
        struct ionic_dev *idev;
        int qtype;
        int err;
 
        idev = &lif->ionic->idev;
-       q_ident = (union ionic_q_identity *)&idev->dev_cmd_regs->data;
+       q_ident = (union ionic_q_identity __iomem *)&idev->dev_cmd_regs->data;
 
        for (qtype = 0; qtype < ARRAY_SIZE(ionic_qtype_versions); qtype++) {
                struct ionic_qtype_info *qti = &lif->qtype_info[qtype];
                                             ionic_qtype_versions[qtype]);
                err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
                if (!err) {
-                       qti->version   = q_ident->version;
-                       qti->supported = q_ident->supported;
-                       qti->features  = le64_to_cpu(q_ident->features);
-                       qti->desc_sz   = le16_to_cpu(q_ident->desc_sz);
-                       qti->comp_sz   = le16_to_cpu(q_ident->comp_sz);
-                       qti->sg_desc_sz   = le16_to_cpu(q_ident->sg_desc_sz);
-                       qti->max_sg_elems = le16_to_cpu(q_ident->max_sg_elems);
-                       qti->sg_desc_stride = le16_to_cpu(q_ident->sg_desc_stride);
+                       qti->version   = readb(&q_ident->version);
+                       qti->supported = readb(&q_ident->supported);
+                       qti->features  = readq(&q_ident->features);
+                       qti->desc_sz   = readw(&q_ident->desc_sz);
+                       qti->comp_sz   = readw(&q_ident->comp_sz);
+                       qti->sg_desc_sz   = readw(&q_ident->sg_desc_sz);
+                       qti->max_sg_elems = readw(&q_ident->max_sg_elems);
+                       qti->sg_desc_stride = readw(&q_ident->sg_desc_stride);
                }
                mutex_unlock(&ionic->dev_cmd_lock);
 
 
 
 static void ionic_dev_cmd_clean(struct ionic *ionic)
 {
-       union ionic_dev_cmd_regs *regs = ionic->idev.dev_cmd_regs;
+       union __iomem ionic_dev_cmd_regs *regs = ionic->idev.dev_cmd_regs;
 
        iowrite32(0, ®s->doorbell);
        memset_io(®s->cmd, 0, sizeof(regs->cmd));
         */
        max_wait = jiffies + (max_seconds * HZ);
 try_again:
-       opcode = idev->dev_cmd_regs->cmd.cmd.opcode;
+       opcode = readb(&idev->dev_cmd_regs->cmd.cmd.opcode);
        start_time = jiffies;
        do {
                done = ionic_dev_cmd_done(idev);
 
        (*((u64 *)(((u8 *)(base_ptr)) + (desc_ptr)->offset)))
 
 #define IONIC_READ_STAT_LE64(base_ptr, desc_ptr) \
-       __le64_to_cpu(*((u64 *)(((u8 *)(base_ptr)) + (desc_ptr)->offset)))
+       __le64_to_cpu(*((__le64 *)(((u8 *)(base_ptr)) + (desc_ptr)->offset)))
 
 struct ionic_stat_desc {
        char name[ETH_GSTRING_LEN];
 
        if (likely(netdev->features & NETIF_F_RXCSUM)) {
                if (comp->csum_flags & IONIC_RXQ_COMP_CSUM_F_CALC) {
                        skb->ip_summed = CHECKSUM_COMPLETE;
-                       skb->csum = (__wsum)le16_to_cpu(comp->csum);
+                       skb->csum = (__force __wsum)le16_to_cpu(comp->csum);
                        stats->csum_complete++;
                }
        } else {
        skb_frag_t *frag;
        bool start, done;
        bool outer_csum;
+       dma_addr_t addr;
        bool has_vlan;
        u16 desc_len;
        u8 desc_nsge;
                        if (frag_left > 0) {
                                len = min(frag_left, left);
                                frag_left -= len;
-                               elem->addr =
-                                   cpu_to_le64(ionic_tx_map_frag(q, frag,
-                                                                 offset, len));
-                               if (dma_mapping_error(dev, elem->addr))
+                               addr = ionic_tx_map_frag(q, frag, offset, len);
+                               if (dma_mapping_error(dev, addr))
                                        goto err_out_abort;
+                               elem->addr = cpu_to_le64(addr);
                                elem->len = cpu_to_le16(len);
                                elem++;
                                desc_nsge++;