arm64: dts: exynos8895: add syscon nodes for peric0/1 and fsys0/1

Add syscon nodes for peric0/1, typically used for USI, and fsys0/1,
typically used for PCI.

Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Link: https://lore.kernel.org/r/20250105161344.420749-3-ivo.ivanov.ivanov1@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
index 36657abfc615ad239d8e4b1fa28ea6cafb885db3..e5fb171376bb0801df07741a33f8245321609bf5 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi
@@ -228,6 +228,12 @@
                                      "usi1", "usi2", "usi3";
                };
 
+               syscon_peric0: syscon@10420000 {
+                       compatible = "samsung,exynos8895-peric0-sysreg", "syscon";
+                       reg = <0x10420000 0x2000>;
+                       clocks = <&cmu_peric0 CLK_GOUT_PERIC0_SYSREG_PERIC0_PCLK>;
+               };
+
                serial_0: serial@10430000 {
                        compatible = "samsung,exynos8895-uart";
                        reg = <0x10430000 0x100>;
@@ -273,6 +279,12 @@
                                      "usi10", "usi11", "usi12", "usi13";
                };
 
+               syscon_peric1: syscon@10820000 {
+                       compatible = "samsung,exynos8895-peric1-sysreg", "syscon";
+                       reg = <0x10820000 0x2000>;
+                       clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK>;
+               };
+
                serial_1: serial@10830000 {
                        compatible = "samsung,exynos8895-uart";
                        reg = <0x10830000 0x100>;
@@ -380,6 +392,12 @@
                                      "ufs", "usbdrd30";
                };
 
+               syscon_fsys0: syscon@11020000 {
+                       compatible = "samsung,exynos8895-fsys0-sysreg", "syscon";
+                       reg = <0x11020000 0x2000>;
+                       clocks = <&cmu_fsys0 CLK_GOUT_FSYS0_SYSREG_FSYS0_PCLK>;
+               };
+
                pinctrl_fsys0: pinctrl@11050000 {
                        compatible = "samsung,exynos8895-pinctrl";
                        reg = <0x11050000 0x1000>;
@@ -398,6 +416,12 @@
                        clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
                };
 
+               syscon_fsys1: syscon@11420000 {
+                       compatible = "samsung,exynos8895-fsys1-sysreg", "syscon";
+                       reg = <0x11420000 0x2000>;
+                       clocks = <&cmu_fsys1 CLK_GOUT_FSYS1_SYSREG_FSYS1_PCLK>;
+               };
+
                pinctrl_fsys1: pinctrl@11430000 {
                        compatible = "samsung,exynos8895-pinctrl";
                        reg = <0x11430000 0x1000>;