ARM: dts: imx7: align pin config nodes with bindings

Bindings expect pin configuration nodes in pinctrl to match certain
naming:

  imx7s-colibri-eval-v3.dtb: pinctrl@30330000: 'lvdstx' does not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'
  imx7s-warp.dtb: pinctrl@30330000: 'usdhc3grp_100mhz', 'usdhc3grp_200mhz' do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi
index 9fe51884af79f55f46ba180536a3d82cb0a939a1..62e41edcaf1d740f18fc3718e6314a49487929fe 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx7-colibri.dtsi
@@ -903,7 +903,7 @@
                >;
        };
 
-       pinctrl_lvds_transceiver: lvdstx {
+       pinctrl_lvds_transceiver: lvdstxgrp {
                fsl,pins = <
                        MX7D_PAD_ENET1_RGMII_RD2__GPIO7_IO2     0x14 /* SODIMM 63 */
                        MX7D_PAD_ENET1_RGMII_RD3__GPIO7_IO3     0x74 /* SODIMM 55 */

diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-nitrogen7.dts b/arch/arm/boot/dts/nxp/imx/imx7d-nitrogen7.dts
index 9c6476bda4a020efaf5db0bb0b06eea133c55c82..7ee66be8bccbe67211dbee0094642f122805739b 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx7d-nitrogen7.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx7d-nitrogen7.dts
@@ -419,7 +419,7 @@
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_hog_1 &pinctrl_j2>;
 
-       pinctrl_hog_1: hoggrp-1 {
+       pinctrl_hog_1: hoggrp {
                fsl,pins = <
                        MX7D_PAD_SD3_RESET_B__GPIO6_IO11        0x5d
                        MX7D_PAD_GPIO1_IO13__GPIO1_IO13         0x7d
@@ -665,7 +665,7 @@
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_hog_2>;
 
-       pinctrl_hog_2: hoggrp-2 {
+       pinctrl_hog_2: hoggrp {
                fsl,pins = <
                        MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2     0x7d
                        MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2     0x7d

diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi b/arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi
index 8d5037ac03c7d1a6651c7f23e6fb871b95932662..a1574ccec89cb14d45d1c51b950dfdd0143a4eba 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi
+++ b/arch/arm/boot/dts/nxp/imx/imx7d-pico.dtsi
@@ -444,14 +444,14 @@
                >;
        };
 
-       pinctrl_can1: can1frp {
+       pinctrl_can1: can1frpgrp {
                fsl,pins = <
                        MX7D_PAD_SAI1_RX_DATA__FLEXCAN1_RX      0x59
                        MX7D_PAD_SAI1_TX_BCLK__FLEXCAN1_TX      0x59
                >;
        };
 
-       pinctrl_can2: can2frp {
+       pinctrl_can2: can2frpgrp {
                fsl,pins = <
                        MX7D_PAD_SAI1_TX_SYNC__FLEXCAN2_RX      0x59
                        MX7D_PAD_SAI1_TX_DATA__FLEXCAN2_TX      0x59
@@ -499,19 +499,19 @@
                >;
        };
 
-       pinctrl_pwm1: pwm1 {
+       pinctrl_pwm1: pwm1grp {
                fsl,pins = <
                        MX7D_PAD_GPIO1_IO08__PWM1_OUT   0x7f
                >;
        };
 
-       pinctrl_pwm2: pwm2 {
+       pinctrl_pwm2: pwm2grp {
                fsl,pins = <
                        MX7D_PAD_GPIO1_IO09__PWM2_OUT   0x7f
                >;
        };
 
-       pinctrl_pwm3: pwm3 {
+       pinctrl_pwm3: pwm3grp {
                fsl,pins = <
                        MX7D_PAD_GPIO1_IO10__PWM3_OUT   0x7f
                >;
@@ -563,7 +563,7 @@
                >;
        };
 
-       pinctrl_usbotg1_pwr: usbotg_pwr {
+       pinctrl_usbotg1_pwr: usbotgpwrgrp {
                fsl,pins = <
                        MX7D_PAD_UART3_TX_DATA__GPIO4_IO5       0x14
                >;
@@ -581,7 +581,7 @@
                >;
        };
 
-       pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
+       pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp {
                fsl,pins = <
                        MX7D_PAD_SD1_CMD__SD1_CMD               0x5a
                        MX7D_PAD_SD1_CLK__SD1_CLK               0x1a
@@ -593,7 +593,7 @@
                >;
        };
 
-       pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
+       pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {
                fsl,pins = <
                        MX7D_PAD_SD1_CMD__SD1_CMD               0x5b
                        MX7D_PAD_SD1_CLK__SD1_CLK               0x1b
@@ -631,7 +631,7 @@
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX7D_PAD_SD3_CMD__SD3_CMD               0x5a
                        MX7D_PAD_SD3_CLK__SD3_CLK               0x1a
@@ -646,7 +646,7 @@
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX7D_PAD_SD3_CMD__SD3_CMD               0x5b
                        MX7D_PAD_SD3_CLK__SD3_CLK               0x1b

diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-remarkable2.dts b/arch/arm/boot/dts/nxp/imx/imx7d-remarkable2.dts
index 92cb45dacda616dafda44c32b2c1a78d85e09cc6..eec526a9631118387895c0894b31540071e6a792 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx7d-remarkable2.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx7d-remarkable2.dts
@@ -508,7 +508,7 @@
                >;
        };
 
-       pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
+       pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp {
                fsl,pins = <
                        MX7D_PAD_SD2_CMD__SD2_CMD               0x5a
                        MX7D_PAD_SD2_CLK__SD2_CLK               0x1a
@@ -519,7 +519,7 @@
                >;
        };
 
-       pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
+       pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp {
                fsl,pins = <
                        MX7D_PAD_SD2_CMD__SD2_CMD               0x5b
                        MX7D_PAD_SD2_CLK__SD2_CLK               0x1b
@@ -546,7 +546,7 @@
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX7D_PAD_SD3_CMD__SD3_CMD               0x5a
                        MX7D_PAD_SD3_CLK__SD3_CLK               0x1a
@@ -562,7 +562,7 @@
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX7D_PAD_SD3_CMD__SD3_CMD               0x5b
                        MX7D_PAD_SD3_CLK__SD3_CLK               0x1b

diff --git a/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts b/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts
index 7bab113ca6da79ed3941e7d6550fecfd31687f25..af4acc311572c19f89e04d58ecbda960a1488a03 100644 (file)
--- a/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts
+++ b/arch/arm/boot/dts/nxp/imx/imx7s-warp.dts
@@ -459,7 +459,7 @@
                >;
        };
 
-       pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
+       pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
                fsl,pins = <
                        MX7D_PAD_SD3_CMD__SD3_CMD               0x5a
                        MX7D_PAD_SD3_CLK__SD3_CLK               0x1a
@@ -475,7 +475,7 @@
                >;
        };
 
-       pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
+       pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
                fsl,pins = <
                        MX7D_PAD_SD3_CMD__SD3_CMD               0x5b
                        MX7D_PAD_SD3_CLK__SD3_CLK               0x1b