#define RADEONFB_CONN_LIMIT                    4
 #define RADEON_BIOS_NUM_SCRATCH                        8
 
-/* fence seq are set to this number when signaled */
-#define RADEON_FENCE_SIGNALED_SEQ              0LL
-
 /* internal ring indices */
 /* r1xx+ has gfx CP ring */
 #define RADEON_RING_TYPE_GFX_INDEX             0
 
  */
 bool radeon_fence_signaled(struct radeon_fence *fence)
 {
-       if (!fence) {
-               return true;
-       }
-       if (fence->seq == RADEON_FENCE_SIGNALED_SEQ) {
+       if (!fence)
                return true;
-       }
-       if (radeon_fence_seq_signaled(fence->rdev, fence->seq, fence->ring)) {
-               fence->seq = RADEON_FENCE_SIGNALED_SEQ;
+       if (radeon_fence_seq_signaled(fence->rdev, fence->seq, fence->ring))
                return true;
-       }
        return false;
 }
 
        }
 
        seq[fence->ring] = fence->seq;
-       if (seq[fence->ring] == RADEON_FENCE_SIGNALED_SEQ)
-               return 0;
-
        r = radeon_fence_wait_seq_timeout(fence->rdev, seq, intr, MAX_SCHEDULE_TIMEOUT);
        if (r < 0) {
                return r;
        }
 
-       fence->seq = RADEON_FENCE_SIGNALED_SEQ;
        return 0;
 }
 
 
                seq[i] = fences[i]->seq;
                ++num_rings;
-
-               /* test if something was allready signaled */
-               if (seq[i] == RADEON_FENCE_SIGNALED_SEQ)
-                       return 0;
        }
 
        /* nothing to wait for ? */