]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
ASoC: SOF: Intel: hda: add 'is_chain_dma_supported' callback
authorPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Tue, 13 Feb 2024 10:12:35 +0000 (12:12 +0200)
committerMark Brown <broonie@kernel.org>
Tue, 13 Feb 2024 13:28:53 +0000 (13:28 +0000)
Reuse existing function to get the interface mask and expose it to the
SOF core with a callback - the main user is the IPC4 topology so only
HDaudio platforms provide this callback.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com>
Link: https://msgid.link/r/20240213101247.28887-4-peter.ujfalusi@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/sof/intel/hda-common-ops.c
sound/soc/sof/intel/hda.c
sound/soc/sof/intel/hda.h
sound/soc/sof/sof-priv.h

index 26105d8f1bdc717e54e205a2283aa8fc43d3cd42..2b385cddc385c5bd59e11acfe8e6bda45704fdd1 100644 (file)
@@ -83,6 +83,7 @@ struct snd_sof_dsp_ops sof_hda_common_ops = {
        /* DAI drivers */
        .drv            = skl_dai,
        .num_drv        = SOF_SKL_NUM_DAIS,
+       .is_chain_dma_supported = hda_is_chain_dma_supported,
 
        /* PM */
        .suspend                = hda_dsp_suspend,
index fe4ae349dad51fb6b23bd0f485bb723029b1e7b7..0bae439feb8bf03f83c8daa7616c0ec6575b010b 100644 (file)
 #define EXCEPT_MAX_HDR_SIZE    0x400
 #define HDA_EXT_ROM_STATUS_SIZE 8
 
-static u32 hda_get_interface_mask(struct snd_sof_dev *sdev)
+static void hda_get_interfaces(struct snd_sof_dev *sdev, u32 *interface_mask)
 {
        const struct sof_intel_dsp_desc *chip;
-       u32 interface_mask[2] = { 0 };
 
        chip = get_chip_info(sdev->pdata);
        switch (chip->hw_ip_version) {
        case SOF_INTEL_TANGIER:
        case SOF_INTEL_BAYTRAIL:
        case SOF_INTEL_BROADWELL:
-               interface_mask[0] =  BIT(SOF_DAI_INTEL_SSP);
+               interface_mask[SOF_DAI_DSP_ACCESS] =  BIT(SOF_DAI_INTEL_SSP);
                break;
        case SOF_INTEL_CAVS_1_5:
        case SOF_INTEL_CAVS_1_5_PLUS:
-               interface_mask[0] = BIT(SOF_DAI_INTEL_SSP) | BIT(SOF_DAI_INTEL_DMIC) |
-                                   BIT(SOF_DAI_INTEL_HDA);
-               interface_mask[1] = BIT(SOF_DAI_INTEL_HDA);
+               interface_mask[SOF_DAI_DSP_ACCESS] =
+                       BIT(SOF_DAI_INTEL_SSP) | BIT(SOF_DAI_INTEL_DMIC) | BIT(SOF_DAI_INTEL_HDA);
+               interface_mask[SOF_DAI_HOST_ACCESS] = BIT(SOF_DAI_INTEL_HDA);
                break;
        case SOF_INTEL_CAVS_1_8:
        case SOF_INTEL_CAVS_2_0:
        case SOF_INTEL_CAVS_2_5:
        case SOF_INTEL_ACE_1_0:
-               interface_mask[0] = BIT(SOF_DAI_INTEL_SSP) | BIT(SOF_DAI_INTEL_DMIC) |
-                                   BIT(SOF_DAI_INTEL_HDA) | BIT(SOF_DAI_INTEL_ALH);
-               interface_mask[1] = BIT(SOF_DAI_INTEL_HDA);
+               interface_mask[SOF_DAI_DSP_ACCESS] =
+                       BIT(SOF_DAI_INTEL_SSP) | BIT(SOF_DAI_INTEL_DMIC) |
+                       BIT(SOF_DAI_INTEL_HDA) | BIT(SOF_DAI_INTEL_ALH);
+               interface_mask[SOF_DAI_HOST_ACCESS] = BIT(SOF_DAI_INTEL_HDA);
                break;
        case SOF_INTEL_ACE_2_0:
-               interface_mask[0] = BIT(SOF_DAI_INTEL_SSP) | BIT(SOF_DAI_INTEL_DMIC) |
-                                   BIT(SOF_DAI_INTEL_HDA) | BIT(SOF_DAI_INTEL_ALH);
-               interface_mask[1] = interface_mask[0]; /* all interfaces accessible without DSP */
+               interface_mask[SOF_DAI_DSP_ACCESS] =
+                       BIT(SOF_DAI_INTEL_SSP) | BIT(SOF_DAI_INTEL_DMIC) |
+                       BIT(SOF_DAI_INTEL_HDA) | BIT(SOF_DAI_INTEL_ALH);
+                /* all interfaces accessible without DSP */
+               interface_mask[SOF_DAI_HOST_ACCESS] =
+                       interface_mask[SOF_DAI_DSP_ACCESS];
                break;
        default:
                break;
        }
+}
+
+static u32 hda_get_interface_mask(struct snd_sof_dev *sdev)
+{
+       u32 interface_mask[SOF_DAI_ACCESS_NUM] = { 0 };
+
+       hda_get_interfaces(sdev, interface_mask);
 
        return interface_mask[sdev->dspless_mode_selected];
 }
 
+bool hda_is_chain_dma_supported(struct snd_sof_dev *sdev, u32 dai_type)
+{
+       u32 interface_mask[SOF_DAI_ACCESS_NUM] = { 0 };
+       const struct sof_intel_dsp_desc *chip;
+
+       if (sdev->dspless_mode_selected)
+               return false;
+
+       hda_get_interfaces(sdev, interface_mask);
+
+       if (!(interface_mask[SOF_DAI_DSP_ACCESS] & BIT(dai_type)))
+               return false;
+
+       if (dai_type == SOF_DAI_INTEL_HDA)
+               return true;
+
+       switch (dai_type) {
+       case SOF_DAI_INTEL_SSP:
+       case SOF_DAI_INTEL_DMIC:
+       case SOF_DAI_INTEL_ALH:
+               chip = get_chip_info(sdev->pdata);
+               if (chip->hw_ip_version < SOF_INTEL_ACE_2_0)
+                       return false;
+               return true;
+       default:
+               return false;
+       }
+}
+
 #if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
 
 /*
index 1592e27bc14daf48002f46c42a8d22098da02068..b36eb7c7891335a3038d5e1402d6f73ede754b81 100644 (file)
@@ -573,6 +573,11 @@ struct sof_intel_hda_stream {
 
 #define SOF_STREAM_SD_OFFSET_CRST 0x1
 
+/*
+ * DAI support
+ */
+bool hda_is_chain_dma_supported(struct snd_sof_dev *sdev, u32 dai_type);
+
 /*
  * DSP Core services.
  */
index 6c163c008607ddae34797e693656a61dc7b93256..5e5c5a36c3c98e8036264b9a8bf15ea16827d285 100644 (file)
@@ -157,6 +157,13 @@ struct sof_firmware {
        u32 payload_offset;
 };
 
+enum sof_dai_access {
+       SOF_DAI_DSP_ACCESS,     /* access from DSP only */
+       SOF_DAI_HOST_ACCESS,    /* access from host only */
+
+       SOF_DAI_ACCESS_NUM
+};
+
 /*
  * SOF DSP HW abstraction operations.
  * Used to abstract DSP HW architecture and any IO busses between host CPU