*/
        for (i = 0; i < n; ) {
                for (j = 0; j < FIFO_TX_DEPTH / 2 && i < n; j++) {
-                       mark = ns_pulse[i] & V4L2_SUBDEV_IR_PULSE_LEVEL_MASK;
+                       mark = ns_pulse[i] & LEVEL_MASK;
                        fifo_pulse[j] = ns_to_pulse_width_count(
                                         ns_pulse[i] &
-                                              ~V4L2_SUBDEV_IR_PULSE_LEVEL_MASK,
+                                              ~LEVEL_MASK,
                                         ir_state->txclk_divider);
                        if (mark)
                                fifo_pulse[j] &= FIFO_RXTX_LVL;
 
  */
 
 enum v4l2_subdev_ir_mode {
-       V4L2_SUBDEV_IR_MODE_PULSE_WIDTH, /* space & mark widths in nanosecs */
+       V4L2_SUBDEV_IR_MODE_PULSE_WIDTH, /* uses struct ir_raw_event records */
 };
 
-/* Data format of data read or written for V4L2_SUBDEV_IR_MODE_PULSE_WIDTH */
-#define V4L2_SUBDEV_IR_PULSE_MAX_WIDTH_NS      0x7fffffff
-#define V4L2_SUBDEV_IR_PULSE_LEVEL_MASK                0x80000000
-#define V4L2_SUBDEV_IR_PULSE_RX_SEQ_END                0xffffffff
-
 struct v4l2_subdev_ir_parameters {
        /* Either Rx or Tx */
        unsigned int bytes_per_data_element; /* of data in read or write call */