.parent         = &clk_pclk_low.clk,
                .enable         = s5p64x0_pclk_ctrl,
                .ctrlbit        = (1 << 25),
-       }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.0",
-               .parent         = &clk_pclk_low.clk,
-               .enable         = s5p64x0_pclk_ctrl,
-               .ctrlbit        = (1 << 26),
        }, {
                .name           = "dsim",
                .parent         = &clk_pclk_low.clk,
                .sources = &clkset_group1,
                .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
                .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 },
-       }, {
-               .clk    = {
-                       .name           = "sclk_audio2",
-                       .ctrlbit        = (1 << 11),
-                       .enable         = s5p64x0_sclk_ctrl,
-               },
-               .sources = &clkset_audio,
-               .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
-               .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
        },
 };
 
        .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
 };
 
+static struct clk clk_i2s0 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.0",
+       .parent         = &clk_pclk_low.clk,
+       .enable         = s5p64x0_pclk_ctrl,
+       .ctrlbit        = (1 << 26),
+};
+
+static struct clksrc_clk clk_audio_bus2 = {
+       .clk    = {
+               .name           = "sclk_audio2",
+               .devname        = "samsung-i2s.0",
+               .ctrlbit        = (1 << 11),
+               .enable         = s5p64x0_sclk_ctrl,
+       },
+       .sources = &clkset_audio,
+       .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
+       .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
+};
+
 static struct clksrc_clk clk_sclk_spi0 = {
        .clk    = {
                .name           = "sclk_spi",
        .id             = -1,
 };
 
+static struct clk *clk_cdev[] = {
+       &clk_i2s0,
+};
+
 static struct clksrc_clk *clksrc_cdev[] = {
        &clk_sclk_uclk,
        &clk_sclk_spi0,
        &clk_sclk_spi1,
        &clk_sclk_mmc0,
        &clk_sclk_mmc1,
-       &clk_sclk_mmc2
+       &clk_sclk_mmc2,
+       &clk_audio_bus2,
 };
 
 static struct clk_lookup s5p6440_clk_lookup[] = {
        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
+       CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
+       CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus2.clk),
 };
 
 void __init_or_cpufreq s5p6440_setup_clocks(void)
 void __init s5p6440_register_clocks(void)
 {
        int ptr;
+       unsigned int cnt;
 
        s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
 
        for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
                s3c_register_clksrc(sysclks[ptr], 1);
 
+       s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+       for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
+               s3c_disable_clocks(clk_cdev[cnt], 1);
+
        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
 
                .parent         = &clk_pclk_low.clk,
                .enable         = s5p64x0_pclk_ctrl,
                .ctrlbit        = (1 << 22),
-       }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.0",
-               .parent         = &clk_pclk_low.clk,
-               .enable         = s5p64x0_pclk_ctrl,
-               .ctrlbit        = (1 << 26),
-       }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.1",
-               .parent         = &clk_pclk_low.clk,
-               .enable         = s5p64x0_pclk_ctrl,
-               .ctrlbit        = (1 << 15),
-       }, {
-               .name           = "iis",
-               .devname        = "samsung-i2s.2",
-               .parent         = &clk_pclk_low.clk,
-               .enable         = s5p64x0_pclk_ctrl,
-               .ctrlbit        = (1 << 16),
        }, {
                .name           = "i2c",
                .devname        = "s3c2440-i2c.1",
 static struct clksrc_clk clk_sclk_audio0 = {
        .clk            = {
                .name           = "audio-bus",
+               .devname        = "samsung-i2s.0",
                .enable         = s5p64x0_sclk_ctrl,
                .ctrlbit        = (1 << 8),
                .parent         = &clk_dout_epll.clk,
        .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
 };
 
+static struct clk clk_i2s0 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.0",
+       .parent         = &clk_pclk_low.clk,
+       .enable         = s5p64x0_pclk_ctrl,
+       .ctrlbit        = (1 << 26),
+};
+
+static struct clk clk_i2s1 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.1",
+       .parent         = &clk_pclk_low.clk,
+       .enable         = s5p64x0_pclk_ctrl,
+       .ctrlbit        = (1 << 15),
+};
+
+static struct clk clk_i2s2 = {
+       .name           = "iis",
+       .devname        = "samsung-i2s.2",
+       .parent         = &clk_pclk_low.clk,
+       .enable         = s5p64x0_pclk_ctrl,
+       .ctrlbit        = (1 << 16),
+};
+
+static struct clk *clk_cdev[] = {
+       &clk_i2s0,
+       &clk_i2s1,
+       &clk_i2s2,
+};
+
 static struct clksrc_clk *clksrc_cdev[] = {
        &clk_sclk_uclk,
        &clk_sclk_spi0,
        &clk_sclk_mmc0,
        &clk_sclk_mmc1,
        &clk_sclk_mmc2,
+       &clk_sclk_audio0,
 };
 
 static struct clk_lookup s5p6450_clk_lookup[] = {
        CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
        CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
        CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
+       CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
+       CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_sclk_audio0.clk),
+       CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1),
+       CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2),
 };
 
 /* Clock initialization code */
        &clk_pclk,
        &clk_hclk_low,
        &clk_pclk_low,
-       &clk_sclk_audio0,
 };
 
 static struct clk dummy_apb_pclk = {
 void __init s5p6450_register_clocks(void)
 {
        int ptr;
+       unsigned int cnt;
 
        for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
                s3c_register_clksrc(sysclks[ptr], 1);
 
+
+       s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+       for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
+               s3c_disable_clocks(clk_cdev[cnt], 1);
+
        s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
        s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
        for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
 
 #include <mach/dma.h>
 #include <mach/irqs.h>
 
-static const char *rclksrc[] = {
-       [0] = "iis",
-       [1] = "sclk_audio2",
-};
-
 static int s5p6440_cfg_i2s(struct platform_device *pdev)
 {
        switch (pdev->id) {
        .type = {
                .i2s = {
                        .quirks = QUIRK_PRI_6CHAN,
-                       .src_clk = rclksrc,
                },
        },
 };
        .type = {
                .i2s = {
                        .quirks = QUIRK_PRI_6CHAN,
-                       .src_clk = rclksrc,
                },
        },
 };
 
 static struct s3c_audio_pdata s5p6450_i2s_pdata = {
        .cfg_gpio = s5p6450_cfg_i2s,
-       .type = {
-               .i2s = {
-                       .src_clk = rclksrc,
-               },
-       },
 };
 
 static struct resource s5p6450_i2s1_resource[] = {