};
 
                usb_1_qmpphy: phy@88e9000 {
-                       compatible = "qcom,sdm845-qmp-usb3-phy";
+                       compatible = "qcom,sdm845-qmp-usb3-dp-phy";
                        reg = <0 0x088e9000 0 0x18c>,
-                             <0 0x088e8000 0 0x10>;
+                             <0 0x088e8000 0 0x38>,
+                             <0 0x088ea000 0 0x40>;
                        status = "disabled";
                        #address-cells = <2>;
                        #size-cells = <2>;
                                 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>;
                        clock-names = "aux", "cfg_ahb", "ref", "com_aux";
 
-                       resets = <&gcc GCC_USB3_DP_PHY_PRIM_BCR>,
-                                <&gcc GCC_USB3_PHY_PRIM_BCR>;
+                       resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
+                                <&gcc GCC_USB3_DP_PHY_PRIM_BCR>;
                        reset-names = "phy", "common";
 
-                       usb_1_ssphy: phy@88e9200 {
+                       usb_1_ssphy: usb3-phy@88e9200 {
                                reg = <0 0x088e9200 0 0x128>,
                                      <0 0x088e9400 0 0x200>,
                                      <0 0x088e9c00 0 0x218>,
                                clock-names = "pipe0";
                                clock-output-names = "usb3_phy_pipe_clk_src";
                        };
+
+                       dp_phy: dp-phy@88ea200 {
+                               reg = <0 0x088ea200 0 0x200>,
+                                     <0 0x088ea400 0 0x200>,
+                                     <0 0x088eaa00 0 0x200>,
+                                     <0 0x088ea600 0 0x200>,
+                                     <0 0x088ea800 0 0x200>;
+                               #clock-cells = <1>;
+                               #phy-cells = <0>;
+                       };
                };
 
                usb_2_qmpphy: phy@88eb000 {
                                 <&dsi0_phy 1>,
                                 <&dsi1_phy 0>,
                                 <&dsi1_phy 1>,
-                                <0>,
-                                <0>;
+                                <&dp_phy 0>,
+                                <&dp_phy 1>;
                        clock-names = "bi_tcxo",
                                      "gcc_disp_gpll0_clk_src",
                                      "gcc_disp_gpll0_div_clk_src",