net: stmmac: prepare dma interrupt treatment for multiple queues

This patch prepares DMA interrupts treatment for multiple queues.

Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h
index 042b4828efaae73fedd68b10df7f73ffb74e88a0..6dfb7f31898e94d70f4602e6e25b5b08f69b1f49 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -438,7 +438,7 @@ struct stmmac_dma_ops {
        void (*start_rx)(void __iomem *ioaddr, u32 chan);
        void (*stop_rx)(void __iomem *ioaddr, u32 chan);
        int (*dma_interrupt) (void __iomem *ioaddr,
-                             struct stmmac_extra_stats *x);
+                             struct stmmac_extra_stats *x, u32 chan);
        /* If supported then get the optional core features */
        void (*get_hw_feature)(void __iomem *ioaddr,
                               struct dma_features *dma_cap);

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h
index 2c19042b47df3093f892743324fb80a109169e2f..946dc14fe77f520ef61c6894bc0e82219335f296 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h
@@ -193,7 +193,7 @@ void dwmac4_dma_stop_tx(void __iomem *ioaddr, u32 chan);
 void dwmac4_dma_start_rx(void __iomem *ioaddr, u32 chan);
 void dwmac4_dma_stop_rx(void __iomem *ioaddr, u32 chan);
 int dwmac4_dma_interrupt(void __iomem *ioaddr,
-                        struct stmmac_extra_stats *x);
+                        struct stmmac_extra_stats *x, u32 chan);
 void dwmac4_set_rx_ring_len(void __iomem *ioaddr, u32 len);
 void dwmac4_set_tx_ring_len(void __iomem *ioaddr, u32 len);
 void dwmac4_set_rx_tail_ptr(void __iomem *ioaddr, u32 tail_ptr, u32 chan);

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
index 3512d18f626b667ed2c68582e6fa0e874a6f534c..fcd8ec8a240b4d6c7465f6c54f52bf474b0b0588 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
@@ -122,11 +122,11 @@ void dwmac4_disable_dma_irq(void __iomem *ioaddr, u32 chan)
 }
 
 int dwmac4_dma_interrupt(void __iomem *ioaddr,
-                        struct stmmac_extra_stats *x)
+                        struct stmmac_extra_stats *x, u32 chan)
 {
        int ret = 0;
 
-       u32 intr_status = readl(ioaddr + DMA_CHAN_STATUS(0));
+       u32 intr_status = readl(ioaddr + DMA_CHAN_STATUS(chan));
 
        /* ABNORMAL interrupts */
        if (unlikely(intr_status & DMA_CHAN_STATUS_AIS)) {
@@ -153,7 +153,7 @@ int dwmac4_dma_interrupt(void __iomem *ioaddr,
                if (likely(intr_status & DMA_CHAN_STATUS_RI)) {
                        u32 value;
 
-                       value = readl(ioaddr + DMA_CHAN_INTR_ENA(STMMAC_CHAN0));
+                       value = readl(ioaddr + DMA_CHAN_INTR_ENA(chan));
                        /* to schedule NAPI on real RIE event. */
                        if (likely(value & DMA_CHAN_INTR_ENA_RIE)) {
                                x->rx_normal_irq_n++;
@@ -172,7 +172,7 @@ int dwmac4_dma_interrupt(void __iomem *ioaddr,
         * status [21-0] expect reserved bits [5-3]
         */
        writel((intr_status & 0x3fffc7),
-              ioaddr + DMA_CHAN_STATUS(STMMAC_CHAN0));
+              ioaddr + DMA_CHAN_STATUS(chan));
 
        return ret;
 }

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
index 6c6cc7137ee05a7ae9202377c4d478531f213efe..9091df86723a3988075cbda535d5d6ba21826b7b 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
@@ -143,7 +143,8 @@ void dwmac_dma_start_tx(void __iomem *ioaddr, u32 chan);
 void dwmac_dma_stop_tx(void __iomem *ioaddr, u32 chan);
 void dwmac_dma_start_rx(void __iomem *ioaddr, u32 chan);
 void dwmac_dma_stop_rx(void __iomem *ioaddr, u32 chan);
-int dwmac_dma_interrupt(void __iomem *ioaddr, struct stmmac_extra_stats *x);
+int dwmac_dma_interrupt(void __iomem *ioaddr, struct stmmac_extra_stats *x,
+                       u32 chan);
 int dwmac_dma_reset(void __iomem *ioaddr);
 
 #endif /* __DWMAC_DMA_H__ */

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
index 7be60c3a24e8b73c3f6e4368b85994826ba0c3ec..38f94305aab53116a74d533728d25cb750da66a1 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c
@@ -156,7 +156,7 @@ static void show_rx_process_state(unsigned int status)
 #endif
 
 int dwmac_dma_interrupt(void __iomem *ioaddr,
-                       struct stmmac_extra_stats *x)
+                       struct stmmac_extra_stats *x, u32 chan)
 {
        int ret = 0;
        /* read the status register (CSR5) */

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index b166c05e2a5d0dc7a7fed8e74615ca73ae43b9ed..79a792a0c12e629b4d1d0202c718e34232faadc4 100644 (file)
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -1591,32 +1591,41 @@ static void stmmac_set_dma_operation_mode(struct stmmac_priv *priv, u32 txmode,
  */
 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
 {
-       u32 chan = STMMAC_CHAN0;
+       u32 tx_channel_count = priv->plat->tx_queues_to_use;
        int status;
+       u32 chan;
 
-       status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
-       if (likely((status & handle_rx)) || (status & handle_tx)) {
-               if (likely(napi_schedule_prep(&priv->napi))) {
-                       stmmac_disable_dma_irq(priv, chan);
-                       __napi_schedule(&priv->napi);
+       for (chan = 0; chan < tx_channel_count; chan++) {
+               status = priv->hw->dma->dma_interrupt(priv->ioaddr,
+                                                     &priv->xstats, chan);
+               if (likely((status & handle_rx)) || (status & handle_tx)) {
+                       if (likely(napi_schedule_prep(&priv->napi))) {
+                               stmmac_disable_dma_irq(priv, chan);
+                               __napi_schedule(&priv->napi);
+                       }
                }
-       }
-       if (unlikely(status & tx_hard_error_bump_tc)) {
-               /* Try to bump up the dma threshold on this failure */
-               if (unlikely(priv->xstats.threshold != SF_DMA_MODE) &&
-                   (tc <= 256)) {
-                       tc += 64;
-                       if (priv->plat->force_thresh_dma_mode)
-                               stmmac_set_dma_operation_mode(priv->ioaddr,
-                                                             tc, tc, chan);
-                       else
-                               stmmac_set_dma_operation_mode(priv->ioaddr, tc,
-                                                            SF_DMA_MODE, chan);
 
-                       priv->xstats.threshold = tc;
+               if (unlikely(status & tx_hard_error_bump_tc)) {
+                       /* Try to bump up the dma threshold on this failure */
+                       if (unlikely(priv->xstats.threshold != SF_DMA_MODE) &&
+                           (tc <= 256)) {
+                               tc += 64;
+                               if (priv->plat->force_thresh_dma_mode)
+                                       stmmac_set_dma_operation_mode(priv,
+                                                                     tc,
+                                                                     tc,
+                                                                     chan);
+                               else
+                                       stmmac_set_dma_operation_mode(priv,
+                                                                   tc,
+                                                                   SF_DMA_MODE,
+                                                                   chan);
+                               priv->xstats.threshold = tc;
+                       }
+               } else if (unlikely(status == tx_hard_error)) {
+                       stmmac_tx_err(priv, chan);
                }
-       } else if (unlikely(status == tx_hard_error))
-               stmmac_tx_err(priv, chan);
+       }
 }
 
 /**