bool                            in_s3;
        bool                            in_s4;
        bool                            in_s0ix;
-       /* indicate amdgpu suspension status */
-       bool                            suspend_complete;
 
        enum pp_mp1_state               mp1_state;
        struct amdgpu_doorbell_index doorbell_index;
 
        struct drm_device *drm_dev = dev_get_drvdata(dev);
        struct amdgpu_device *adev = drm_to_adev(drm_dev);
 
-       adev->suspend_complete = false;
        if (amdgpu_acpi_is_s0ix_active(adev))
                adev->in_s0ix = true;
        else if (amdgpu_acpi_is_s3_active(adev))
        struct drm_device *drm_dev = dev_get_drvdata(dev);
        struct amdgpu_device *adev = drm_to_adev(drm_dev);
 
-       adev->suspend_complete = true;
        if (amdgpu_acpi_should_gpu_reset(adev))
                return amdgpu_asic_reset(adev);
 
 
         * confirmed that the APU gfx10/gfx11 needn't such update.
         */
        if (adev->flags & AMD_IS_APU &&
-                       adev->in_s3 && !adev->suspend_complete) {
-               DRM_INFO(" Will skip the CSB packet resubmit\n");
+                       adev->in_s3 && !pm_resume_via_firmware()) {
+               DRM_INFO("Will skip the CSB packet resubmit\n");
                return 0;
        }
        r = amdgpu_ring_alloc(ring, gfx_v9_0_get_csb_size(adev) + 4 + 3);
 
         *    performing pm core test.
         */
        if (adev->flags & AMD_IS_APU && adev->in_s3 &&
-                       !pm_resume_via_firmware()) {
-               adev->suspend_complete = false;
+                       !pm_resume_via_firmware())
                return true;
-       } else {
-               adev->suspend_complete = true;
+       else
                return false;
-       }
 }
 
 static int soc15_asic_reset(struct amdgpu_device *adev)
 
        /* Will reset for the following suspend abort cases.
         * 1) Only reset dGPU side.
         * 2) S3 suspend got aborted and TOS is active.
+        *    As for dGPU suspend abort cases the SOL value
+        *    will be kept as zero at this resume point.
         */
-       if (!(adev->flags & AMD_IS_APU) && adev->in_s3 &&
-           !adev->suspend_complete) {
+       if (!(adev->flags & AMD_IS_APU) && adev->in_s3) {
                sol_reg1 = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81);
                msleep(100);
                sol_reg2 = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_81);