return -EINVAL;
 }
 
-static int vi_gpu_pci_config_reset(struct amdgpu_device *adev)
+/**
+ * vi_asic_pci_config_reset - soft reset GPU
+ *
+ * @adev: amdgpu_device pointer
+ *
+ * Use PCI Config method to reset the GPU.
+ *
+ * Returns 0 for success.
+ */
+static int vi_asic_pci_config_reset(struct amdgpu_device *adev)
 {
        u32 i;
+       int r = -EINVAL;
 
-       dev_info(adev->dev, "GPU pci config reset\n");
+       amdgpu_atombios_scratch_regs_engine_hung(adev, true);
 
        /* disable BM */
        pci_clear_master(adev->pdev);
                        /* enable BM */
                        pci_set_master(adev->pdev);
                        adev->has_hw_reset = true;
-                       return 0;
+                       r = 0;
+                       break;
                }
                udelay(1);
        }
-       return -EINVAL;
-}
-
-/**
- * vi_asic_pci_config_reset - soft reset GPU
- *
- * @adev: amdgpu_device pointer
- *
- * Use PCI Config method to reset the GPU.
- *
- * Returns 0 for success.
- */
-static int vi_asic_pci_config_reset(struct amdgpu_device *adev)
-{
-       int r;
-
-       amdgpu_atombios_scratch_regs_engine_hung(adev, true);
-
-       r = vi_gpu_pci_config_reset(adev);
 
        amdgpu_atombios_scratch_regs_engine_hung(adev, false);