int (*set_thermal_fan_table)(struct smu_context *smu);
        int (*get_fan_speed_percent)(struct smu_context *smu, uint32_t *speed);
        int (*get_gpu_power)(struct smu_context *smu, uint32_t *value);
-       int (*get_current_activity_percent)(struct smu_context *smu,
-                                           enum amd_pp_sensors sensor,
-                                           uint32_t *value);
        int (*set_watermarks_table)(struct smu_context *smu, void *watermarks,
                                    struct dm_pp_wm_sets_with_clock_ranges_soc15 *clock_ranges);
        int (*get_current_clk_freq_by_table)(struct smu_context *smu,
        ((smu)->ppt_funcs->get_fan_speed_percent ? (smu)->ppt_funcs->get_fan_speed_percent((smu), (speed)) : 0)
 #define smu_get_gpu_power(smu, val) \
        ((smu)->ppt_funcs->get_gpu_power ? (smu)->ppt_funcs->get_gpu_power((smu), (val)) : 0)
-#define smu_get_current_activity_percent(smu, val) \
-       ((smu)->ppt_funcs->get_current_activity_percent ? (smu)->ppt_funcs->get_current_activity_percent((smu), (sensor), (val)) : 0)
 #define smu_set_fan_speed_percent(smu, speed) \
        ((smu)->funcs->set_fan_speed_percent ? (smu)->funcs->set_fan_speed_percent((smu), (speed)) : 0)
 
 
                *(uint32_t *)data = pptable->FanMaximumRpm;
                *size = 4;
                break;
+       case AMDGPU_PP_SENSOR_GPU_LOAD:
+               ret = navi10_get_current_activity_percent(smu, (uint32_t *)data);
+               *size = 4;
+               break;
        default:
                return -EINVAL;
        }
        .force_dpm_limit_value = navi10_force_dpm_limit_value,
        .unforce_dpm_levels = navi10_unforce_dpm_levels,
        .get_gpu_power = navi10_get_gpu_power,
-       .get_current_activity_percent = navi10_get_current_activity_percent,
        .is_dpm_running = navi10_is_dpm_running,
        .set_thermal_fan_table = navi10_set_thermal_fan_table,
        .get_fan_speed_percent = navi10_get_fan_speed_percent,
 
 {
        int ret = 0;
        switch (sensor) {
-       case AMDGPU_PP_SENSOR_GPU_LOAD:
-       case AMDGPU_PP_SENSOR_MEM_LOAD:
-               ret = smu_get_current_activity_percent(smu,
-                                                      sensor,
-                                                      (uint32_t *)data);
-               *size = 4;
-               break;
        case AMDGPU_PP_SENSOR_GFX_MCLK:
                ret = smu_get_current_clk_freq(smu, SMU_UCLK, (uint32_t *)data);
                *size = 4;
 
        return 0;
 }
 
-static int vega20_read_sensor(struct smu_context *smu,
-                             enum amd_pp_sensors sensor,
-                             void *data, uint32_t *size)
-{
-       int ret = 0;
-       struct smu_table_context *table_context = &smu->smu_table;
-       PPTable_t *pptable = table_context->driver_pptable;
-
-       switch (sensor) {
-       case AMDGPU_PP_SENSOR_MAX_FAN_RPM:
-               *(uint32_t *)data = pptable->FanMaximumRpm;
-               *size = 4;
-               break;
-       default:
-               return -EINVAL;
-       }
-
-       return ret;
-}
-
 static bool vega20_is_dpm_running(struct smu_context *smu)
 {
        int ret = 0;
        return 0;
 }
 
+static int vega20_read_sensor(struct smu_context *smu,
+                                enum amd_pp_sensors sensor,
+                                void *data, uint32_t *size)
+{
+       int ret = 0;
+       struct smu_table_context *table_context = &smu->smu_table;
+       PPTable_t *pptable = table_context->driver_pptable;
+
+       switch (sensor) {
+       case AMDGPU_PP_SENSOR_MAX_FAN_RPM:
+               *(uint32_t *)data = pptable->FanMaximumRpm;
+               *size = 4;
+               break;
+       case AMDGPU_PP_SENSOR_MEM_LOAD:
+       case AMDGPU_PP_SENSOR_GPU_LOAD:
+               ret = vega20_get_current_activity_percent(smu,
+                                               sensor,
+                                               (uint32_t *)data);
+               *size = 4;
+               break;
+       default:
+               return -EINVAL;
+       }
+
+       return ret;
+}
+
 static int vega20_set_watermarks_table(struct smu_context *smu,
                                       void *watermarks, struct
                                       dm_pp_wm_sets_with_clock_ranges_soc15
        .set_thermal_fan_table = vega20_set_thermal_fan_table,
        .get_fan_speed_percent = vega20_get_fan_speed_percent,
        .get_gpu_power = vega20_get_gpu_power,
-       .get_current_activity_percent = vega20_get_current_activity_percent,
        .set_watermarks_table = vega20_set_watermarks_table,
 };